Abstract: Disclosed herein are stacked transistors with dielectric between source/drain materials of different strata, as well as related methods and devices. In some embodiments, an integrated circuit structure may include stacked strata of transistors, wherein a dielectric material is between source/drain materials of adjacent strata, and the dielectric material is conformal on underlying source/drain material.

Abstract: Methods for semiconductor processing include annealing a sacrificial material to change a characteristic of the sacrificial material. Changes may include reducing line edge roughness, changing density, changing surface chemistry, or changing a dimension of patterns of the sacrificial material. At least one additional process may be included to change a layer positioned below the sacrificial material before removing all, or substantially all, of the sacrificial material.

Abstract: An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing method spans a timeframe from about 1 millisecond to about 1 second. An example for this annealing method includes a sub-second anneal method where a reduction in the formation of nickel pipes is achieved during salicide processing. In some cases, the method and apparatus combine the rapid heating rate of a sub-second anneal with a thermally conductive substrate to provide quick cooling for a silicon wafer. Thus, the thermal budget of the sub-second anneal methods may span the range from conventional RTP anneals to flash annealing processes (including duration of the anneal, as well as peak temperature). Other embodiments are described.

Abstract: Temperature measurement using a pyrometer in a processing chamber is described. The extraneous light received by the pyrometer is reduced. In one example, a photodetector is used to measure the intensity of light within the processing chamber at a defined wavelength. A temperature circuit is used to convert the measured light intensity to a temperature signal, and a doped optical window between a heat source and a workpiece inside processing chamber is used to absorb light at the defined wavelength directed at the workpiece from the heat source.

Abstract: Temperature measurement using a pyrometer in a processing chamber is described. The extraneous light received by the pyrometer is reduced. In one example, a photodetector is used to measure the intensity of light within the processing chamber at a defined wavelength. A temperature circuit is used to convert the measured light intensity to a temperature signal, and a doped optical window between a heat source and a workpiece inside processing chamber is used to absorb light at the defined wavelength directed at the workpiece from the heat source.

Abstract: An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing method spans a timeframe from about 1 millisecond to about 1 second. An example for this annealing method includes a sub-second anneal method where a reduction in the formation of nickel pipes is achieved during salicide processing. In some cases, the method and apparatus combine the rapid heating rate of a sub-second anneal with a thermally conductive substrate to provide quick cooling for a silicon wafer. Thus, the thermal budget of the sub-second anneal methods may span the range from conventional RTP anneals to flash annealing processes (including duration of the anneal, as well as peak temperature). Other embodiments are described.

Abstract: Systems and methods for preparing inorganic-organic interfaces using organo-transition metal complexes and self-assembled monolayers as organic surfaces. In one embodiment, a silicon wafer is cleaned and reacted with stabilized pirhana etch to provide an oxide surface. The surface is reacted with the trichlorosilyl end of alkyltrichlorosilanes to prepare self assembling monomers (SAMs). The alkyltrichlorosilanes have the general formula R1-R—SiCl3, where R1 is —OH, —NH2, —COOH, —SH, COOCH3, —CN, and R is a conjugated hydrocarbon, such as (CH2)n where n is in the range of 3 to 18. The functionalized end of the SAM can optionally modified chemically as appropriate, and is then reacted with metal-bearing species such as tetrakis(dimethylamido)titanium, Ti[N(CH3)2]4, (TDMAT) to provide a titanium nitride layer.