Patents by Inventor Aravind THARAYIL NARAYANAN

Aravind THARAYIL NARAYANAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Phase-locked loop
    Patent number: 11962315
    Abstract: A phase-locked loop comprises a voltage controlled oscillator. The voltage controlled oscillator comprises an inductor and a capacitor, connected in parallel, and also connected in parallel therewith, a negative resistance structure. A first terminal of the negative resistance structure is connected to respective first terminals of the inductor and the capacitor. A second terminal of the negative resistance structure is connected to respective second terminals of the inductor and the capacitor. The negative resistance structure exhibits a tunable capacitance, such that a frequency of an output of the voltage controlled oscillator can be tuned by a control input signal, and the control input signal is generated in the phase-locked loop. The negative resistance structure comprises first and second transistors.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: April 16, 2024
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Aravind Tharayil Narayanan, Staffan Ek, Lars Sundström, Roland Strandberg
  • PHASE-LOCKED LOOP
    Publication number: 20230179209
    Abstract: A phase-locked loop comprises a voltage controlled oscillator. The voltage controlled oscillator comprises an inductor and a capacitor, connected in parallel, and also connected in parallel therewith, a negative resistance structure. A first terminal of the negative resistance structure is connected to respective first terminals of the inductor and the capacitor. A second terminal of the negative resistance structure is connected to respective second terminals of the inductor and the capacitor. The negative resistance structure exhibits a tunable capacitance, such that a frequency of an output of the voltage controlled oscillator can be tuned by a control input signal, and the control input signal is generated in the phase-locked loop. The negative resistance structure comprises first and second transistors.
    Type: Application
    Filed: March 31, 2020
    Publication date: June 8, 2023
    Applicant: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Aravind THARAYIL NARAYANAN, Staffan EK, Lars SUNDSTRÖM, Roland STRANDBERG