Patents by Inventor Aravindh Bakthavathsalu

Aravindh Bakthavathsalu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for determining the criticality of a micro-operation
    Publication number: 20050268074
    Abstract: A method and apparatus for whacking a ?OP based upon the criticality of that ?OP. Also disclosed are embodiments of a method for determining the criticality of a ?OP.
    Type: Application
    Filed: August 9, 2005
    Publication date: December 1, 2005
    Inventors: KS Venkatraman, Aravindh Bakthavathsalu
  • Decoupling floating point linear address
    Patent number: 6934828
    Abstract: A technique is described to reduce the complexity of floating point linear address (FLA) maintenance in a superscalar processor by coupling FLA updates when floating point data is stored instead of when floating point addresses are stored.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: August 23, 2005
    Assignee: Intel Corporation
    Inventors: Rajesh S. Parthasarathy, Aravindh Bakthavathsalu
  • Decoupling floating point linear address
    Publication number: 20040054868
    Abstract: A technique is described to reduce the complexity of floating point linear address (FLA) maintenance in a superscalar processor by coupling FLA updates when floating point data is stored instead of when floating point addresses are stored.
    Type: Application
    Filed: September 17, 2002
    Publication date: March 18, 2004
    Inventors: Rajesh S. Parthasarathy, Aravindh Bakthavathsalu
  • In-circuit-emulation event management system
    Patent number: 5630102
    Abstract: A microprocessor system utilizing an in-circuit emulator (ICE) to aid in testing and debugging by an external emulator. The microprocessor operates in two modes. One mode is emulation mode in which the microprocessor outputs trace information for allowing the emulator to reconstruct microprocessor execution, and the other mode is interrogation mode where the microprocessor ceases emulation mode, and allows the emulator to modify the state of the microprocessor or interrogate it. An ICEBRK signal is provided on the microprocessor to better handle transition from emulation to interrogation mode. An address mark counter and generator is provided to force the microprocessor to automatically issue an address mark message which includes the location of the microprocessor's instruction pointer. An AMCTRL bit may be further provided to allow a human user to selectively inhibit the issuance of an address mark.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: May 13, 1997
    Assignee: Intel Corporation
    Inventors: Thomas M. Johnson, Aravindh Bakthavathsalu, Richard Brunner, Eliot Garbus, Byron Gillespie, Stephen J. Strazdus