Patents by Inventor Archit Joshi

Archit Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for gaussian random noise generation
    Patent number: 9331681
    Abstract: In accordance with an embodiment, a method of generating noise includes generating, using a hardware-based noise generator, a plurality of periodic waveforms having different frequencies, weighting, using the hardware-based noise generator, amplitudes of the plurality of periodic waveforms based on a predetermined spectral shape to form a plurality of weighted waveforms, and summing the plurality of plurality of weighted waveforms to form an output random noise signal.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: May 3, 2016
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V
    Inventors: Gagan Midha, Archit Joshi
  • System and Method for Gaussian Random Noise Generation
    Publication number: 20150123721
    Abstract: In accordance with an embodiment, a method of generating noise includes generating, using a hardware-based noise generator, a plurality of periodic waveforms having different frequencies, weighting, using the hardware-based noise generator, amplitudes of the plurality of periodic waveforms based on a predetermined spectral shape to form a plurality of weighted waveforms, and summing the plurality of plurality of weighted waveforms to form an output random noise signal.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 7, 2015
    Applicant: STMicroelectronics International N.V.
    Inventors: Gagan Midha, Archit Joshi
  • Data transition density normalization for half rate CDRs with bang-bang phase detectors
    Patent number: 8823429
    Abstract: A clock and data recovery circuit includes a phase detector circuit, a charge pump circuit, and a voltage controlled oscillator. The phase detector circuit receives a data signal from an external device and a clock signal from the voltage controlled oscillator and generates a first and a second phase difference signal. The charge pump circuit includes an OR gate receiving on its inputs the first and the second phase difference signals and configured to generate a current if the first and/or second phase difference signal is high.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: September 2, 2014
    Assignee: STMicroelectronics International N.V.
    Inventor: Archit Joshi