Patents by Inventor Ardehsir J. Sidhwa

Ardehsir J. Sidhwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Elimination of cracks generated after a rapid thermal process step of a semiconductor wafer
    Patent number: 6291337
    Abstract: Two improved process steps of eliminating cracks within TiN and/or BPSG layers after the RTP process are provided. The first is to provide a low deposition power, preferably below 6.5 KWH, and a high process pressure, preferably above 5.6 mTorr, to the TiN layer. No crack is found for this improved TiN deposition process when the RTP temperature rises from 450° C. to about 700° C. The second is to provide a low RTP temperature, preferably below 595° C., to the semiconductor wafer. No crack, again, is found by using this low RTP temperature.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: September 18, 2001
    Assignee: STMicroelectronics, Inc.
    Inventor: Ardehsir J. Sidhwa