Abstract: A method for controlling gain of an amplifier includes amplifying one or more received signals to produce one or more amplified signals. The method also includes generating a plurality of down converted signals using the one or more amplified signals. The method further includes amplifying the plurality of down converted signals based on a gain control signal. In addition, the method includes varying a time constant of the gain control signal based on a time derivative parameter associated with the plurality of down converted signals.

Abstract: An adjustable phase shifter generates a phase shifted reference signal by introducing a phase shift in a reference signal. A phase detector identifies a phase difference between the reference signal and the phase shifted reference signal. A control signal generator generates a plurality of control signals, each of which causes the adjustable phase shifter to adjust a magnitude of at least one component value in the adjustable phase shifter. The phase shift introduced by the adjustable phase shifter is based at least partially on the magnitude of the at least one component value in the adjustable phase shifter. The control signal generator also selects one of the control signals, where the selected control signal causes the adjustable phase shifter to produce the phase shifted reference signal such that the phase difference attains a specified value. The analog filter adjusts a magnitude of at least one component value in the analog filter based at least partially on the selected control signal.

Abstract: The invention relates to trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local oscillator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R*). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted period signal (R*) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R8). A lowpass filter (205) receives the test signal (T) and generates a level signal (TDC) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (CS), having a serial format, on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (CS) into a control signal (CP) having a parallel signal format.

Abstract: The invention relates to gain control for an amplifier for received radio signals by means of an automatic gain control signal (c). A down converter (103) produces signal components (I; Q) that are amplified in a respective amplifier (104, 105). Then, the resulting signal components (IP-LP; QP-LP) are digitised in A/D-converters (110; 111) for further processing in a digital signal processor (112) and are also fed to a respective signal level detector (113; 114) whose output signals ([I]; [Q]) are combined (115) into a combined signal (V&Sgr;). This signal (V&Sgr;) is forwarded to a gain control unit (116), which produces the automatic gain control signal (c). The automatic gain control signal (c) controls the gain of the amplifiers (104; 105) such that the resulting signal components (IP-LP; QP-LP) are maintained at signal level ([I]; [Q]) less than a predetermined limit level being adapted to the A/D-converters (110; 111).

Abstract: The invention relates to trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local oscillator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R*). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted period signal (R*) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R8). A lowpass filter (205) receives the test signal (T) and generates a level signal (TDC) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (CS), having a serial format, on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (CS) into a control signal (CP) having a parallel signal format.

Abstract: The invention relates to gain control for an amplifier for received radio signals by means of an automatic gain control signal (c). A down converter (103) produces signal components (I; Q) from received radio frequency signals (RF). The signal components (I; Q) are amplified in a respective amplifier (104; 105), low pass filtered (106; 107) and further amplified (108; 109). Then, the resulting signal components (IP-LP; Q−LP) are digitised in A/D-converters (110; 111 ) for further processing in a digital signal processor (112). The resulting signal components (IP-LP; QP-LP) are also fed to a respective signal level detector (113; 114) whose output signals ([I]; [Q]) are combined (115) into a combined signal (V&Sgr;). This signal (V&Sgr;) is forwarded to a gain control unti (116), which produces the automatic gain control signal (c).

Abstract: The invention relates to trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local oscillator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R*). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted period signal (R*) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R8). A lowpass filter (205) receives the test signal (T) and generates a level signal (TDC) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (CS), having a serial format, on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (CS) into a control signal (CP) having a parallel signal format.