Abstract: A floating point adder operates in a subtraction mode. In order to avoid excess shifting resulting in a negative exponent, as might happen in the case of a substraction operation which results in an unnormalized number where the exponent of the subtraction result is low, the following steps are provided. A number is created having leading zeros no greater in number than the value of the exponent part; this number is logically combined with the mantissa part in a bit-wise OR operation, to provide a combined number; the position of a leading bit state of the combined number is detected, and the mantissa part of the original number is shifted a number of bit positions dependent on the detected position.