Patents by Inventor Aria Ahmadi

Aria Ahmadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12347119
    Abstract: A method of generating a training dataset suitable for training machine learning algorithms to estimate the motion of objects, and for training a machine learning algorithm to perform motion estimation. A plurality of pairs of synthetic images are generated from obtained objects and backgrounds, each pair have a first frame and a second frame. The first frame includes a selection of objects in first positions and first orientations superimposed on a selected background, and the second frame includes the selection of objects in second positions and second orientations superimposed on the selected background. Also provided are processing systems configured to carry out these methods.
    Type: Grant
    Filed: March 28, 2024
    Date of Patent: July 1, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Aria Ahmadi, David Walton, Cagatay Dikici
  • Publication number: 20250181564
    Abstract: A hardware-implemented method of indexing data elements in a source array in a memory, generates a number of shifted copy arrays based on the source array, each shifted copy array comprising the data elements of the source array at a respective shifted position. A plurality of indices for indexing the source array are received, each index of the plurality of indices indicating a target location in the source array, and for each index of the plurality of indices, a data element is retrieved from each of the shifted copy arrays. The retrieved elements are gated based on the index, to thereby select a data element.
    Type: Application
    Filed: January 30, 2025
    Publication date: June 5, 2025
    Inventors: Aria Ahmadi, Cagatay Dikici
  • Publication number: 20250148264
    Abstract: A windowed operation is implemented in at least three traversed dimensions. The windowed operation applies a window having at least three dimensions to data having at least three traversed dimensions, with shifts of the window in all three traversed dimensions. Two dimensions of the at least three traversed dimensions are selected, and the windowed operation is mapped to a plurality of constituent 2-D windowed operations in the selected two dimensions, the 2-D windowed operations applying a slice of the window to a slice of the data, with shifts of the slice of the window in only two dimensions. Each of the plurality of 2-D windowed operations is implemented by at least one hardware accelerator, each 2-D windowed operation producing a respective partial result, and the partial results are assembled to produce the result of the windowed operation.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Inventors: Ivaxi Sheth, Aria Ahmadi, James Imber, Cagatay Dikici
  • Patent number: 12229105
    Abstract: A hardware-implemented method of indexing data elements in a source array is provided. The method comprises generating a number of shifted copy arrays; receiving indices for indexing the source array; and retrieving one or more data elements from the shifted copy arrays, according to the received indices. Also disclosed is a related processing system comprising a memory and hardware for indexing data elements in a source array in the memory.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: February 18, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Aria Ahmadi, Cagatay Dikici
  • Patent number: 12198034
    Abstract: A data processing system and method are disclosed, for implementing a windowed operation in at least three traversed dimensions. The data processing system maps the windowed operation in at least three traversed dimensions to a plurality of constituent windowed operations in two traversed dimensions. This plurality of 2-D windowed operations is implemented as such in at least one hardware accelerator. The data processing system assembles the results of the constituent 2-D windowed operations to produce the result of the windowed operation in at least three traversed dimensions.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: January 14, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Ivaxi Sheth, Aria Ahmadi, James Imber, Cagatay Dikici
  • Publication number: 20240346107
    Abstract: A method and data processing system for resampling a first set of samples using a neural network accelerator. The first set of samples is arranged in a tensor extending in at least a first dimension defined in a first coordinate system. A set of resampling parameters is determined, having a first resampling factor a_1/b_1 for a first dimension, and a first offset d_1 for the first dimension. At least a first number of kernels is obtained, and the first set of samples is resampled to produce a second set of samples, based on the first resampling factor and the first offset.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 17, 2024
    Inventors: Aria Ahmadi, Cagatay Dikici
  • Patent number: 12073567
    Abstract: A method of analysing objects in a first frame and a second frame is disclosed. The method includes segmenting the frames, and matching at least one object in the first frame with a corresponding object in the second frame. The method optionally includes estimating the motion of the at least one matched object between the frames. Also disclosed is a method of generating a training dataset suitable for training machine learning algorithms to estimate the motion of objects. Also provided are processing systems configured to carry out these methods.
    Type: Grant
    Filed: February 28, 2021
    Date of Patent: August 27, 2024
    Assignee: Imagination Technologies Limited
    Inventors: Aria Ahmadi, David Walton, Cagatay Dikici
  • Publication number: 20240265556
    Abstract: A method of generating a training dataset suitable for training machine learning algorithms to estimate the motion of objects, and for training a machine learning algorithm to perform motion estimation. A plurality of pairs of synthetic images are generated from obtained objects and backgrounds, each pair have a first frame and a second frame. The first frame includes a selection of objects in first positions and first orientations superimposed on a selected background, and the second frame includes the selection of objects in second positions and second orientations superimposed on the selected background. Also provided are processing systems configured to carry out these methods.
    Type: Application
    Filed: March 28, 2024
    Publication date: August 8, 2024
    Inventors: Aria Ahmadi, David Walton, Cagatay Dikici
  • Publication number: 20240169024
    Abstract: A method of implementing a scatter operation in fixed-function hardware of a neural network accelerator involves converting two or more vectors of indices to sparse index tensors in a one-hot sparse format. An update tensor is generated, by applying the update values to one of the sparse index tensors (or a tensor derived from it). In some examples, an input data tensor is updated based on the update tensor. In other examples, the update tensor itself is output.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 23, 2024
    Inventors: Le Yang, Aria Ahmadi, Cagatay Dikici
  • Publication number: 20240169025
    Abstract: A method of implementing a scatter operation in fixed-function hardware of a neural network accelerator involves converting two or more vectors of indices to sparse index tensors in a one-hot sparse format. An update tensor is generated, by applying the update values to one of the sparse index tensors (or a tensor derived from it). In some examples, an input data tensor is updated based on the update tensor. In other examples, the update tensor itself is output.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 23, 2024
    Inventors: Le Yang, Aria Ahmadi, Cagatay Dikici
  • Publication number: 20240160692
    Abstract: A method of implementing a scatter operation in fixed-function hardware of a neural network accelerator involves converting two or more vectors of indices to sparse index tensors in a one-hot sparse format. An update tensor is generated, by applying the update values to one of the sparse index tensors (or a tensor derived from it). In some examples, an input data tensor is updated based on the update tensor. In other examples, the update tensor itself is output.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 16, 2024
    Inventors: Le Yang, Aria Ahmadi, Cagatay Dikici
  • Publication number: 20240143986
    Abstract: Methods of dividing a neural network into chunks of operations executable in a hardware pass of hardware to execute a neural network. The layers of the neural network are divisible into layer groups that comprise a sequence of layers executable in the same hardware pass of the hardware. Each layer group is divisible into chunks of operations executable in a hardware pass of the hardware. The chunks for a layer group are defined by split parameters. A layer group loss function is obtained that represents a performance metric associated with executing a layer group on the hardware as a function of the split parameters and neural network architecture parameters for the layer group.
    Type: Application
    Filed: June 29, 2023
    Publication date: May 2, 2024
    Inventors: Aria Ahmadi, Cagatay Dikici, Clement Charnay, Jason Rogers
  • Publication number: 20230019151
    Abstract: A mechanism for processing, on a hardware accelerator comprising fixed-function circuitry, data according to a neural network process that includes a pooling, unpooling or backward pooling and/or binary argmax/argmin function. The function is mapped to a set of elementary neural network operations available to the fixed-function circuitry. The neural network process is then executed using the fixed-function circuitry. The data processed using the neural network process comprises image and/or audio data.
    Type: Application
    Filed: June 27, 2022
    Publication date: January 19, 2023
    Inventors: Aria Ahmadi, Cagatay Dikici, Muhammad Asad, Elia Condorelli
  • Publication number: 20230021204
    Abstract: A method and data processing system for implementing a neural network containing at least one matrix multiplication operation. The matrix multiplication operation is mapped to a graph of neural network operations including at least one element-wise operation. The at least one element-wise operation is implemented in fixed-function hardware of a neural network accelerator.
    Type: Application
    Filed: June 28, 2022
    Publication date: January 19, 2023
    Inventors: Biswarup Choudhury, Aria Ahmadi, James Imber, Cagatay Dikici, Timothy Atherton
  • Publication number: 20230012553
    Abstract: A mechanism for processing, on a hardware accelerator comprising fixed-function circuitry, data according to a neural network process that comprises a neural network with an associated argmax or argmin function. The argmax or argmin function is mapped to a set of elementary neural network operations available to the fixed-function circuitry. The neural network process is then executed using the fixed-function circuitry. The data processed using the neural network process comprises image and/or audio data.
    Type: Application
    Filed: June 27, 2022
    Publication date: January 19, 2023
    Inventors: Aria Ahmadi, Muhammad Asad, Cagatay Dikici, Elia Condorelli
  • Publication number: 20220391172
    Abstract: Methods for implementing an exponential operation, and a softmax neural network layer, in neural network accelerator hardware, and a data processing system for implementing the exponential operation and a data processing system for implementing the softmax layer. The exponential operation or softmax layer is mapped to a plurality of elementary neural network operations, and the neural network accelerator hardware evaluates these operations, to produce the result of the operation or layer respectively.
    Type: Application
    Filed: February 25, 2022
    Publication date: December 8, 2022
    Inventors: James Imber, Biswarup Choudhury, Cagatay Dikici, Timothy Atherton, Aria Ahmadi
  • Publication number: 20220351036
    Abstract: Methods and systems of generating gradients of a loss metric for a neural network (NN) with respect to weights of a convolution layer of the NN, the convolution layer of the NN configured to receive an input tensor of input values and a weight tensor of weights, and generate an output tensor of output values.
    Type: Application
    Filed: March 19, 2022
    Publication date: November 3, 2022
    Inventors: Aria Ahmadi, Cagatay Dikici
  • Publication number: 20220253506
    Abstract: A method and data processing system implement dilated convolution operations in hardware. Embodiments provide various ways to implement a dilated convolution based on a number of constituent convolutions, by either splitting the kernel to construct a set of constituent convolutions with smaller kernels, or dividing the input data into multiple parts and applying a convolution to each part separately. The constituent convolutions are evaluated in hardware and their results are combined to produce the result of the dilated convolution.
    Type: Application
    Filed: January 25, 2022
    Publication date: August 11, 2022
    Inventors: Aria Ahmadi, Cagatay Dikici, Clement Charnay
  • Publication number: 20220253716
    Abstract: A method and data processing system implement a neural network containing at least one matrix multiplication operation. The matrix multiplication operation is mapped to a graph of neural network operations including at least one transformation and at least one convolution. The at least one convolution is implemented in fixed-function hardware of a neural network accelerator.
    Type: Application
    Filed: January 4, 2022
    Publication date: August 11, 2022
    Inventors: Biswarup Choudhury, Aria Ahmadi, James Imber, Cagatay Dikici, Timothy Atherton
  • Publication number: 20220101102
    Abstract: A data processing system and method are disclosed, for implementing a windowed operation in at least three traversed dimensions. The data processing system maps the windowed operation in at least three traversed dimensions to a plurality of constituent windowed operations in two traversed dimensions. This plurality of 2-D windowed operations is implemented as such in at least one hardware accelerator. The data processing system assembles the results of the constituent 2-D windowed operations to produce the result of the windowed operation in at least three traversed dimensions.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 31, 2022
    Inventors: Ivaxi Sheth, Aria Ahmadi, James Imber, Cagatay Dikici