Patents by Inventor Aric Hadav
Aric Hadav has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12610483Abstract: A chassis node coupling system includes a chassis node configured to be received at a first end of a chassis assembly, wherein the chassis node size exceeds the chassis assembly size. A latch assembly with one or more coupling assemblies may be configured to releasably couple the chassis node to the chassis assembly.Type: GrantFiled: October 22, 2021Date of Patent: April 21, 2026Assignee: EMC IP Holding Company, LLCInventors: Aric Hadav, Amital Alkalay, Thomas N. Dibb
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Patent number: 12436829Abstract: A technique is directed to managing a server cluster that includes multiple servers. The technique involves receiving, from a server in the server cluster, set of heartbeat signals through a power transmission circuit constructed and arranged to deliver power to the server cluster. The technique further involves detecting an interruption in receiving the set of heartbeat signals. The technique further involves, in response to detecting the interruption in receiving the set of heartbeat signals, performing a remedial activity to coordinate input/output (I/O) operations among the multiple servers in the server cluster.Type: GrantFiled: September 25, 2023Date of Patent: October 7, 2025Assignee: Dell Products L.P.Inventors: Dmitry Vladimirovich Krivenok, Amitai Alkalay, Aric Hadav
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Patent number: 12405733Abstract: Techniques for reducing power consumption in a storage system that includes a disk array enclosure (DAE). The techniques include selecting a number of active drives for inclusion in an active drive subgroup of the DAE, and designating a number of inactive (OFF or non-operational) drives for inclusion in an inactive drive subgroup of the DAE. The total number of drives included in the DAE equals the sum of the number of active drives and the number of inactive drives. The techniques further include monitoring at least one condition (e.g., storage capacity utilization, drive wear-leveling, system performance) pertaining to a power consumption of the storage system, and reducing the power consumption by dynamically adapting the number of active drives in the active drive subgroup based on the monitored condition. By dynamically adapting the number of active drives based on certain storage system conditions, significant reductions in power consumption can be achieved.Type: GrantFiled: August 24, 2023Date of Patent: September 2, 2025Assignee: Dell Products L.P.Inventors: Amitai Alkalay, Lior Kamran, Aric Hadav
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Publication number: 20250103414Abstract: A technique is directed to managing a server cluster that includes multiple servers. The technique involves receiving, from a server in the server cluster, set of heartbeat signals through a power transmission circuit constructed and arranged to deliver power to the server cluster. The technique further involves detecting an interruption in receiving the set of heartbeat signals. The technique further involves, in response to detecting the interruption in receiving the set of heartbeat signals, performing a remedial activity to coordinate input/output (I/O) operations among the multiple servers in the server cluster.Type: ApplicationFiled: September 25, 2023Publication date: March 27, 2025Inventors: Dmitry Vladimirovich Krivenok, Amitai Alkalay, Aric Hadav
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Patent number: 12259845Abstract: A technique of managing message between chassis includes forming a first message by a computing node in a first chassis. The first message complies with a first communications protocol and provides an instruction directed to a controller in a second chassis to manage one or more hardware functions of the second chassis. The controller operates in accordance with a second communications protocol that is different from the first communications protocol. The technique further includes transmitting both the first message and a set of I/O requests from the first chassis to the second chassis over a communications link configured to carry messages complying with the first communications protocol. The technique further includes converting, in the second chassis, the first message complying with the first communications protocol into a second message complying with the second communications protocol, the second message including the instruction directed to the controller.Type: GrantFiled: August 7, 2023Date of Patent: March 25, 2025Assignee: Dell Products L.P.Inventors: Aric Hadav, Amitai Alkalay, Boris Glimcher
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Publication number: 20250068338Abstract: Techniques for reducing power consumption in a storage system that includes a disk array enclosure (DAE). The techniques include selecting a number of active drives for inclusion in an active drive subgroup of the DAE, and designating a number of inactive (OFF or non-operational) drives for inclusion in an inactive drive subgroup of the DAE. The total number of drives included in the DAE equals the sum of the number of active drives and the number of inactive drives. The techniques further include monitoring at least one condition (e.g., storage capacity utilization, drive wear-leveling, system performance) pertaining to a power consumption of the storage system, and reducing the power consumption by dynamically adapting the number of active drives in the active drive subgroup based on the monitored condition. By dynamically adapting the number of active drives based on certain storage system conditions, significant reductions in power consumption can be achieved.Type: ApplicationFiled: August 24, 2023Publication date: February 27, 2025Inventors: Amitai Alkalay, Lior Kamran, Aric Hadav
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Publication number: 20250053535Abstract: A technique of managing message between chassis includes forming a first message by a computing node in a first chassis. The first message complies with a first communications protocol and provides an instruction directed to a controller in a second chassis to manage one or more hardware functions of the second chassis. The controller operates in accordance with a second communications protocol that is different from the first communications protocol. The technique further includes transmitting both the first message and a set of I/O requests from the first chassis to the second chassis over a communications link configured to carry messages complying with the first communications protocol. The technique further includes converting, in the second chassis, the first message complying with the first communications protocol into a second message complying with the second communications protocol, the second message including the instruction directed to the controller.Type: ApplicationFiled: August 7, 2023Publication date: February 13, 2025Inventors: Aric Hadav, Amitai Alkalay, Boris Glimcher
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Patent number: 12141472Abstract: Techniques provide communication between storage processors (SPs) of a storage array. The techniques involve electrically coupling the SPs with an interconnect of the storage array. The techniques further involve electrically coupling a storage device having dual on-device controllers with the interconnect. The techniques further involve establishing a communications pathway between the SPs through the interconnect and the storage device having the dual on-device controllers while the SPs are electrically coupled with the interconnect and while the storage device is electrically coupled with the interconnect.Type: GrantFiled: January 11, 2023Date of Patent: November 12, 2024Assignee: Dell Products L.P.Inventors: Amitai Alkalay, Boris Glimcher, Aric Hadav, Lior Kamran
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Patent number: 12072827Abstract: Techniques provide communications bandwidth between storage processors (SPs). Such techniques involve electrically coupling the SPs with a first side of a midplane. Such techniques further involve electrically coupling a network interface controller (NIC) device with a second side of the midplane that is opposite the first side of the midplane. Such techniques further involve configuring the NIC device to convey communications between the SPs while the SPs are electrically coupled with the first side of the midplane and while the NIC device is electrically coupled with the second side of the midplane that is opposite the first side of the midplane.Type: GrantFiled: October 24, 2022Date of Patent: August 27, 2024Assignee: Dell Products L.P.Inventors: Amitai Alkalay, Aric Hadav, Lior Kamran
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Publication number: 20240241666Abstract: Techniques provide communication between storage processors (SPs) of a storage array. The techniques involve electrically coupling the SPs with an interconnect of the storage array. The techniques further involve electrically coupling a storage device having dual on-device controllers with the interconnect. The techniques further involve establishing a communications pathway between the SPs through the interconnect and the storage device having the dual on-device controllers while the SPs are electrically coupled with the interconnect and while the storage device is electrically coupled with the interconnect.Type: ApplicationFiled: January 11, 2023Publication date: July 18, 2024Inventors: Amitai Alkalay, Boris Glimcher, Aric Hadav, Lior Kamran
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Publication number: 20240232119Abstract: Techniques provide communications bandwidth between storage processors (SPs). Such techniques involve electrically coupling the SPs with a first side of a midplane. Such techniques further involve electrically coupling a network interface controller (NIC) device with a second side of the midplane that is opposite the first side of the midplane. Such techniques further involve configuring the NIC device to convey communications between the SPs while the SPs are electrically coupled with the first side of the midplane and while the NIC device is electrically coupled with the second side of the midplane that is opposite the first side of the midplane.Type: ApplicationFiled: October 24, 2022Publication date: July 11, 2024Inventors: Amitai Alkalay, Aric Hadav, Lior Kamran
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Publication number: 20240134814Abstract: Techniques provide communications bandwidth between storage processors (SPs). Such techniques involve electrically coupling the SPs with a first side of a midplane. Such techniques further involve electrically coupling a network interface controller (NIC) device with a second side of the midplane that is opposite the first side of the midplane. Such techniques further involve configuring the NIC device to convey communications between the SPs while the SPs are electrically coupled with the first side of the midplane and while the NIC device is electrically coupled with the second side of the midplane that is opposite the first side of the midplane.Type: ApplicationFiled: October 23, 2022Publication date: April 25, 2024Inventors: Amitai Alkalay, Aric Hadav, Lior Kamran
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Patent number: 11853234Abstract: A host can include a programmable network interface card (NIC) or “Smart NIC” which accesses host-local drives hidden from a host processor. One configuration can include a switch with a one logical partition including the NIC as a root complex (RC) and the local drives as end points (EPs), and with another logical partition including the host processor as an RC and the NIC as an EP. A second configuration can include the NIC and switch directly connected to the host processor with an access control component (ACC) configured on switch ports connected to the local drives. A third configuration can include the NIC and local drives directly connected to the host processor with the ACC configured on host processor ports connected to the local drives. The NIC can use a multi-layer driver to communicate with the ACC and local drives hidden behind the ACC.Type: GrantFiled: January 5, 2022Date of Patent: December 26, 2023Assignee: Dell Products L.P.Inventors: Boris Glimcher, Aric Hadav, Amitai Alkalay
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Patent number: 11847316Abstract: Methods and systems for managing storage of data in a distributed system are disclosed. To manage storage of data in a distributed system, a data processing system may include a network interface controller (NIC). The NIC may present emulated storages that may be used for data storage. The emulated storage devices may be implemented with a storage pipeline that uses any number of storage devices that may be local or remote to the data processing system. The computing resources of the data processing system may view the emulated storage as a local device. The NIC may use its storage pipeline to service its own storage needs. By doing so, the NIC may improve the likelihood that its hosted applications have sufficient storage service access.Type: GrantFiled: April 18, 2022Date of Patent: December 19, 2023Assignee: Dell Products L.P.Inventors: Boris Glimcher, Aric Hadav
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Publication number: 20230333735Abstract: Methods and systems for managing storage of data in a distributed system are disclosed. To manage storage of data in a distributed system, a data processing system may include a network interface controller (NIC). The NIC may present emulated storages that may be used for data storage. The emulated storage devices may be implemented with a storage pipeline that uses any number of storage devices that may be local or remote to the data processing system. The computing resources of the data processing system may view the emulated storage as a local device. The NIC may use its storage pipeline to service its own storage needs. By doing so, the NIC may improve the likelihood that its hosted applications have sufficient storage service access.Type: ApplicationFiled: April 18, 2022Publication date: October 19, 2023Inventors: BORIS GLIMCHER, ARIC HADAV
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Patent number: 11726660Abstract: Techniques providing connectivity between a CPU and physical storage devices (PDs) can use a loop back path formed between two connectors of an extended PO slot when an extended I/O card is inserted therein. The two connectors can include a first connector having connectivity with the CPU over a first set of lanes, and a second connector having connectivity with the PDs over a second set of lanes. While the extended I/O card is inserted into the I/O slot, connectivity can be provided between the CPU and the PDs using connectivity provided between the CPU and the first connector and the first set of lanes; using the loop back path provided between the first and second connectors; and using connectivity provided between the second connector and the PDs over the second set of lanes.Type: GrantFiled: April 15, 2022Date of Patent: August 15, 2023Assignee: Dell Products L.P.Inventors: Aric Hadav, Thomas N. Dibb, Amitai Alkalay
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Publication number: 20230214333Abstract: A host can include a programmable network interface card (NIC) or “Smart NIC” which accesses host-local drives hidden from a host processor. One configuration can include a switch with a one logical partition including the NIC as a root complex (RC) and the local drives as end points (EPs), and with another logical partition including the host processor as an RC and the NIC as an EP. A second configuration can include the NIC and switch directly connected to the host processor with an access control component (ACC) configured on switch ports connected to the local drives. A third configuration can include the NIC and local drives directly connected to the host processor with the ACC configured on host processor ports connected to the local drives. The NIC can use a multi-layer driver to communicate with the ACC and local drives hidden behind the ACC.Type: ApplicationFiled: January 5, 2022Publication date: July 6, 2023Applicant: Dell Products L.P.Inventors: Boris Glimcher, Aric Hadav, Amitai Alkalay
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Patent number: 11675719Abstract: A method, computer program product, and computing system for coupling a multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs). One or more signals may be routed, via the multi-host RDMA card, between the at least a pair of CPUs.Type: GrantFiled: April 26, 2021Date of Patent: June 13, 2023Assignee: EMC IP Holding Company, LLCInventors: Aric Hadav, Xiang Yu, Sandburg Hu, Kunzheng Zhang
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Publication number: 20230127240Abstract: A chassis node coupling system includes a chassis node configured to be received at a first end of a chassis assembly, wherein the chassis node size exceeds the chassis assembly size. A latch assembly with one or more coupling assemblies may be configured to releasably couple the chassis node to the chassis assembly.Type: ApplicationFiled: October 22, 2021Publication date: April 27, 2023Inventors: Aric Hadav, Amital Alkalay, Thomas N. Dibb
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Patent number: 11596073Abstract: An electronic equipment assembly has an interconnect including columns of signal conductors, connectors mounted to the columns of signal conductors, and a chassis coupled with the interconnect. The chassis provides slots that guide resource devices into engagement with the connectors mounted to the columns of signal conductors to enable the interconnect to electronically access the resource devices. At least one column of the columns of signal conductors of the interconnect is a multi-function column. Each multi-function column is constructed and arranged to electronically access different types of resource devices through a respective connector mounted to that multi-function column.Type: GrantFiled: April 22, 2021Date of Patent: February 28, 2023Assignee: EMC IP Holding Company LLCInventors: Kunzheng Zhang, Sandburg Hu, Aric Hadav, Xiang Yu, Yuxin Chen