Patents by Inventor Arie van Staveren

Arie van Staveren has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230074853
    Abstract: The present disclosure relates to a spray head configured to clean a teat of a dairy animal, comprising a body comprising an inner contour at least partly enclosing a cleaning zone that is configured to receive the teat of the dairy animal; a fluid inlet; and at least one nozzle that is in fluid connection with the fluid inlet and is arranged along at least part of the inner contour of the body.
    Type: Application
    Filed: January 21, 2021
    Publication date: March 9, 2023
    Inventor: Arie VAN STAVEREN
  • Patent number: 9276475
    Abstract: A switched mode assisted linear (SMAL) amplifier/regulator architecture can be configured to supply regulated power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator can include a linear amplifier and a switched mode converter parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched converter are cooperatively controlled to supply load current. The amplifier can include separate feedback loops: an external relatively lower speed feedback loop for controlling signal path bandwidth, and an internal relatively higher speed feedback loop for controlling output impedance bandwidth of the linear amplifier. The linear amplifier can be AC coupled to the supply node, and the switched converter can be configured with a capacitive charge control loop that controls the switched converter to effectively control the amplifier to provide capacitive charge control.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: March 1, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Carsten Barth, John Hoversten, Steven Berg, Vahid Yousefzadeh, Arie Van Staveren, Bert Helleman
  • Patent number: 9030236
    Abstract: A phase detection system for providing a phase signal indicative of a phase difference between first and second input signals, with the system including a pair of amplification channels for receiving the input signals, with each channel including a plurality of amplifier stages. The outputs of the two amplification channels are connected to the inputs of a multiplier arrangement, with the arrangement producing an uncompensated phase signal. Compensation circuitry is provided to receive a magnitude signal indicative of the relative magnitudes of the two input signals, with the magnitude signal being used to produce a corrected phase signal indicative of the phase difference between the two input signals.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: May 12, 2015
    Assignee: National Semiconductor Corporation
    Inventors: Marc Gerardus Maria Stegers, Arie Van Staveren
  • Publication number: 20140125299
    Abstract: The disclosed switched mode assisted linear (SMAL) amplifier/regulator architecture may be configured as a SMAL regulator to supply power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator include configurations in which a linear amplifier and a switched mode converter (switcher) parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched mode converter are cooperatively controlled to supply load current. In one embodiment, the amplifier includes separate feedback loops: an external relatively lower speed feedback loop may be configured for controlling signal path bandwidth, and an internal relatively higher speed feedback loop may be configured for controlling output impedance bandwidth of the linear amplifier.
    Type: Application
    Filed: August 9, 2013
    Publication date: May 8, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Carsten Barth, John Hoversten, Steven Berg, Vahid Yousefzadeh, Arie Van Staveren, Bert Helleman
  • Patent number: 8422970
    Abstract: A circuit is configured to receive an input signal and to produce an output signal measuring a power of the input signal. The circuit includes a multiplier cell configured to multiply first and second signals, where each of the first and second signals includes a component related to the input signal and a component related to the output signal. The circuit also includes a controlled amplifier configured to amplify an intermediate signal produced by the multiplier cell, where an amplification provided by the controlled amplifier is a function of the output signal. The circuit could further include at least one first converting amplifier configured to generate the component related to the input signal and at least one second converting amplifier configured to generate the component related to the output signal. Transconductances of the converting amplifiers could be selected to configure the circuit as a linear or logarithmic RMS power detector.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: April 16, 2013
    Assignee: National Semiconductor Corporation
    Inventors: Arie van Staveren, Michael Hendrikus Laurentius Kouwenhoven
  • Publication number: 20130038351
    Abstract: A phase detection system for providing a phase signal indicative of a phase difference between first and second input signals, with the system including a pair of amplification channels for receiving the input signals, with each channel including a plurality of amplifier stages. The outputs of the two amplification channels are connected to the inputs of a multiplier arrangement, with the arrangement producing an uncompensated phase signal. Compensation circuitry is provided to receive a magnitude signal indicative of the relative magnitudes of the two input signals, with the magnitude signal being used to produce a corrected phase signal indicative of the phase difference between the two input signals.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Applicant: National Semiconductor Corporation
    Inventors: Marc Gerardus Maria Stegers, Arie van Staveren
  • Patent number: 7268609
    Abstract: One embodiment of the present invention is directed to an apparatus for reducing errors affecting the intercept of a logarithmic device, the apparatus including a first switching device coupled to an input of the logarithmic device. The first switching device for switches the input of the logarithmic device between an input signal and a reference signal. The apparatus further includes a polarity switching device coupled to an output of the logarithmic device. The polarity switching device is configured to switch the polarity of an output signal of the logarithmic device when the logarithmic device is receiving one of the input signal and the reference signal. The apparatus further includes a low pass filter coupled to the polarity switching device.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: September 11, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Arie van Staveren, Michael Hendrikus Laurentius Kouwenhoven
  • Patent number: 7197292
    Abstract: A method and circuit to eliminate an offset noise, which may be produced at or near DC (zero Hertz) in an analog, linear multiplier, is described. An input signal is chopped (converted to another frequency) by a first chopper, shifting a frequency of the input signal such that the multiplier output signal is shifted away from DC. An output signal of the multiplier is subsequently chopped again by a second chopper employing the same chopping frequency as the first chopper. This converts a frequency of the output signal to a desired frequency at or near DC. The double chopping also shifts the offset noise produced by the multiplier to a frequency, that is higher than the frequency of the output signal. The offset noise can then be removed by a low-pass filter leaving the output signal without the offset noise.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: March 27, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Michael Hendrikus Kouwenhoven, Arie van Staveren