Patents by Inventor Arieh Don

Arieh Don has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240020397
    Abstract: The technologies described herein are generally directed toward maintaining data coherence after an updating node fails during an update. According to an embodiment, a system can comprise a processor and a memory that can enable performance of operations including respectively mapping a logical storage resource to first and second storage resources in first and second security zones associated with first provider and second providers. The operations can further include receiving a request to store a data resource at the logical storage resource. Further, the operations can include, based on a distribution policy associated with the data resource, dividing, by the storage controller equipment, the data resource into a first storage segment stored on the first storage resource and a second storage segment stored on the second storage segment stored on the second storage resource.
    Type: Application
    Filed: July 18, 2022
    Publication date: January 18, 2024
    Inventors: Tomer Shachar, Arieh Don, Yevgeni Gehtman, Maxim Balin
  • Publication number: 20240020203
    Abstract: Application aware storage volumes and snapshots are disclosed. An application, such as a data protection application, can discover a mapping between an application and storage volumes. The mapping, represented as application metadata, can be written to the volume and/or to backups. The application metadata facilitates application management and allows different administrators to communicate more effectively.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Inventors: Balasundaram Govindan, Sunil Kumar, Arieh Don, Ravi Prakash Reddy Mittamida
  • Patent number: 11853561
    Abstract: A primary storage array calculates signatures of chunks of production device data that are sent to a target device on a secondary storage array. The chunk signatures are sent to a signature device on the secondary storage array, where the chunk signatures are stored within the same LBA range on the signature device as their corresponding chunks are stored on the target device. Snaps of the target and signature device are created and associated as a snap pair. Later, the primary storage array calculates signatures of changed chunks of production device data that are sent to the target device. The changed chunk signatures are sent to the signature device. New snaps of the target and signature device are created and associated as a new snap pair. Chunk data is validated by calculating signatures of the chunks from the target device and comparing those signatures with the chunk signatures from the signature device.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: December 26, 2023
    Assignee: Dell Products L.P.
    Inventors: Arieh Don, Krishna Deepak Nuthakki, Jehuda Shemer
  • Publication number: 20230409199
    Abstract: An apparatus comprises at least one processing device. The at least one processing device is configured to identify at least one logical storage device that has a first service level objective and is exhibiting a deficiency in one or more performance metrics, to identify one or more additional logical storage devices each having a second service level objective lower than the first service level objective and not exhibiting a deficiency in the one or more performance metrics, to generate at least one false-positive signal specifying the one or more additional logical storage devices as each exhibiting a deficiency in the one or more performance metrics, and to provide the at least one false-positive signal to at least one host device. The at least one host device is configured to respond to the at least one false-positive signal by throttling input-output operations for the one or more additional logical storage devices.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 21, 2023
    Inventors: Sanjib Mallick, Vinay G. Rao, Jaeyoo Jung, Arieh Don
  • Patent number: 11841940
    Abstract: An information handling system may include at least one processor; a plurality of physical storage resources; and a network interface configured to communicatively couple the information handling system to a plurality of host systems; wherein the information handling system is configured to: determine a likelihood of compromise for each of the plurality of host systems; and in response to the likelihood of compromise for a particular host system exceeding a threshold likelihood, carry out a remedial action with respect to the particular host system, wherein the remedial action includes restricting access from the particular host system to the plurality of physical storage resources.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: December 12, 2023
    Assignee: Dell Products L.P.
    Inventors: Susan E. Young, Elie Jreij, Arieh Don
  • Patent number: 11836355
    Abstract: A method may include, in an operating system of an information handling system: responsive to a determination that a storage resource of the information handling system is experiencing a predictor of a failure of the storage resource, issuing a command to the storage resource to reload firmware code of the storage resource; responsive to the storage resource reloading the firmware code and reset of the storage resource following reloading of the firmware code, determining whether the predictor persists; and responsive to determining whether the predictor persists, performing a responsive action.
    Type: Grant
    Filed: November 21, 2021
    Date of Patent: December 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Donald Mace, Xiaoye Jiang, Arieh Don
  • Patent number: 11809268
    Abstract: A congestion and failure detector and localizer running on a storage array locally monitors ports of the storage array for IO failures and local link errors and remotely monitors ports of host initiators and host-side and storage array-side switches for link errors. Based on whether the local link error rate is increasing at any ports, whether IO failures are associated with a single host initiator port, and whether link error rate is increasing on both the host initiator and initiator-side switch, the congestion and failure detector and localizer generates a flag indicating either a physical link problem between the storage array and adjacent switch, ISL physical issue or spreading congestion, host initiator-side physical link problem, or path congestion. The flag identifies the storage array port, issue type, link, fabric name, and host initiator.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: November 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Arieh Don, Scott Rowlands, Erik Smith
  • Publication number: 20230351013
    Abstract: An apparatus comprises at least one processing device configured to implement a multi-path layer in a host device, wherein the multi-path layer controls delivery of input-output (IO) operations from the host device to a storage system over selected ones of a plurality of paths through a network. The multi-path layer is configured, for each of at least a subset of the IO operations, to store at least a process identifier, a user identifier and an access type for the IO operation. The multi-path layer is further configured to perform analytics on the stored process identifiers, user identifiers and access types to detect an access pattern, and responsive to the detected access pattern having one or more designated characteristics associated with malware, to generate an alert. The alert may be generated by inserting security alert indicators into respective ones of the IO operations, for extraction therefrom by the storage system.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Inventors: Sanjib Mallick, Arieh Don, Elik Levin, Kundan Kumar, Gaurav Singh
  • Patent number: 11805039
    Abstract: A method, comprising: receiving a plurality of first response times, each of the plurality of first response times corresponding to a different one of a plurality of first network paths between a first host device and the first storage array, the plurality of first response times being received from the first host device; receiving a plurality of second response times, each of the plurality of second response times corresponding to a different one of a plurality of second network paths between a second host device and the first storage array, the plurality of second response times being received from the second host device; and processing the plurality of first response times and the plurality of second response times, wherein the plurality of first network paths and the plurality of second network paths are part of a communications network.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: October 31, 2023
    Assignee: Dell Products L.P.
    Inventors: Scott Rowlands, Krishna Deepak Nuthakki, Arieh Don
  • Publication number: 20230333993
    Abstract: Techniques for obfuscating and/or de-obfuscating data using bit-level shard masks are disclosed. Shard masks are generated. The shard masks are designed to shard a block of data into a number of shards for distribution and storage among a number of storage arrays. The shard masks shard the block of data at a bit-level granularity. The shard masks are applied to the block of data to generate the shards. The shards are then distributed among the storage arrays for storage on the storage arrays.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 19, 2023
    Inventors: Thomas L. Watson, Yevgeni Gehtman, Tomer Shachar, Maxim Balin, Arieh Don
  • Publication number: 20230333871
    Abstract: Methods, apparatus, and processor-readable storage media for implementing host-controlled service levels are provided herein. An example computer-implemented method includes obtaining, at a storage node of a storage system, information comprising one or more identifiers and one or more service levels that are assigned to virtual machines identified by the one or more identifiers; extracting one of the one or more identifiers from an input-output operation received at the storage node; identifying, based on the extracted identifier, the service level that is assigned to the virtual machine that initiated the input-output operation; and controlling storage resources allocated for one or more additional input-output operations from one or more of the virtual machines based at least in part on the identified service level.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 19, 2023
    Inventors: Dan Aharoni, Arieh Don, Drew P. Tonnesen
  • Publication number: 20230333752
    Abstract: A primary storage array calculates signatures of chunks of production device data that are sent to a target device on a secondary storage array. The chunk signatures are sent to a signature device on the secondary storage array, where the chunk signatures are stored within the same LBA range on the signature device as their corresponding chunks are stored on the target device. Snaps of the target and signature device are created and associated as a snap pair. Later, the primary storage array calculates signatures of changed chunks of production device data that are sent to the target device. The changed chunk signatures are sent to the signature device. New snaps of the target and signature device are created and associated as a new snap pair. Chunk data is validated by calculating signatures of the chunks from the target device and comparing those signatures with the chunk signatures from the signature device.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 19, 2023
    Applicant: Dell Products L.P.
    Inventors: Arieh Don, Krishna Deepak Nuthakki, Jehuda Shemer
  • Patent number: 11789624
    Abstract: An apparatus comprises at least one processing device that includes a processor coupled to a memory. The processing device is configured to control delivery of input-output operations from a host device to at least first and second storage systems over selected ones of a plurality of paths through a network, to detect a single point of failure condition relating to a given one of the paths to a particular logical storage device in one of the first and second storage systems, and to determine whether or not the particular logical storage device is accessible in another one of the first and second storage systems. Different types of notifications are generated by the processing device depending on whether or not the particular logical storage device is accessible in the other one of the first and second storage systems.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: October 17, 2023
    Assignee: Dell Products L.P.
    Inventors: Vinay G. Rao, Sanjib Mallick, Arieh Don
  • Patent number: 11782611
    Abstract: Data encrypted using a first device-specific key of a first host device is written to a first logical storage device of a storage system. The storage system generates a copy of the first logical storage device, and associates the copy of the first logical storage device with a second logical storage device of the storage system. Data encrypted using a second device-specific key of a second host device is written to the second logical storage device of the storage system. Responsive to a request from the second host device for particular data of the second logical storage device, the storage system determines if the particular data was encrypted using the first key or the second key, and provides the second host device with the particular data and an indication of a result of the determination.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: October 10, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Tomer Shachar, Arieh Don, Yevgeni Gehtman, Maxim Balin
  • Publication number: 20230315291
    Abstract: An apparatus comprises a processing device configured to detect an input-output (IO) pressure condition relating to at least one logical storage volume of a storage system, to receive IO operations directed to the at least one logical storage volume, to extract processing entity identifiers from respective ones of the received IO operations, and to perform IO throttling for the at least one logical storage volume based at least in part on the extracted processing entity identifiers. For example, a first group of one or more of the IO operations each having a first processing entity identifier may be subject to the IO throttling, while a second group of one or more of the IO operations each having a second processing entity identifier different than the first processing entity identifier is not subject to the IO throttling. Other differences in IO throttling can be implemented using the extracted processing entity identifiers.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Inventors: Sanjib Mallick, Vinay G Rao, Arieh Don
  • Patent number: 11775557
    Abstract: In one example, a method involves performing an initial discovery process that includes querying a storage array, and identifying, based on the query, one or more hosts that are registered with the storage array. This initial discovery process is performed automatically without requiring user action to identify the one or more hosts. The method additionally includes presenting a list of discovered hosts, receiving a selection input from a user specifying one or more of the hosts in the list, retrieving, from the storage array, information associated with each of the respective hosts, and making the information available to a user.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: October 3, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Sunil Kumar, Vinay Rao, Boaz Michaely, Arieh Don
  • Patent number: 11768744
    Abstract: Techniques for detecting and managing target port overloads due to host initiator or path failures may include: receiving I/Os from initiators of a host at target ports of a data storage system; determining initiator workloads for the initiators; determining target workloads for the target ports; determining that a first of the initiators of the host is a failed initiator that has stopped sending I/Os to the data storage system, wherein the first initiator has a first of the initiator workloads; determining, in accordance with the first initiator workload, revised target workloads for the target ports; determining, in accordance with revised target workloads, whether any of the target ports is expected to be overloaded; and responsive to determining that at least one of the target ports is expected to be overloaded, performing a corrective action to alleviate or reduce an overloaded workload condition expected for the at least one target port.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: September 26, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Krishna Deepak Nuthakki, Arieh Don
  • Patent number: 11750457
    Abstract: An apparatus in one embodiment includes at least one processing device configured to receive at least one notification from a switch of a switch fabric coupled between one or more host devices and a storage system, to select a particular one of a plurality of zoning sets based at least in part on the one or more received notifications, and to send an indication of the selected zoning set to the switch. The indication of the selected zoning set illustratively comprises a command that instructs the switch to alter its zoning configuration in accordance with the selected zoning set. In some embodiments, the processing device comprises a data protection appliance coupled to a storage area network that includes the switch fabric. The switch may comprise a Fibre Channel (FC) switch of an FC switch fabric, and the notification may comprise a fabric performance impact notification (FPIN) generated by the switch.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: September 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Jehuda Shemer, Arieh Don
  • Patent number: 11722564
    Abstract: A multi-path input-output (MPIO) driver in a host server reduces host-copy migration data transmission rate based on decrease in foreground IO response time. A baseline foreground IO response time measured before commencement of the host-copy migration is compared with a reference foreground IO response time measured after commencement of the host-copy migration. Increase in the foreground IO response time, expressed as a percentage or time value, that satisfies a predetermined limit will trigger reduction of the host-copy migration data transmission rate. The reference foreground IO response time is repeatedly measured and updated each time the host-copy migration data transmission rate is decreased.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: August 8, 2023
    Assignee: DELL PRODUCTS L.P.
    Inventors: Arieh Don, Sanjib Mallick, Vinay Rao, Drew Tonnesen
  • Patent number: 11720254
    Abstract: Bandwidth consumption and/or an I/O transmission rate on an I/O path between a port of a storage system and a physical host port may be managed, including determining when multiple virtual host ports correspond to (i.e., are mapped to) a same physical host port. This virtual host port mapping information may be used to more accurately determine bandwidth consumption and I/O transmission rates on I/O connections along an I/O path including the physical host port, and to adjust the bandwidth consumption and/or I/O transmission rate on one more of these I/O connections according to bandwidth thresholds and I/O count thresholds defined for the I/O path (e.g., for the Physical host port of the I/O path).
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: August 8, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Krishna Deepak Nuthakki, Arieh Don, Erik P. Smith