Patents by Inventor Arieh Don

Arieh Don has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11088964
    Abstract: Systems and methods for scheduling multiple flows in a computing system or for allocating resources to the flows in the computing system. Each flow may be associated with a target priority and a target performance. A current priority can be determined for each flow and resources are allocated based on the highest current priority. Over time, the current priorities change and each flow will receive resources as the flows are scheduled for execution. No flow is starved of resources.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: August 10, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Stephen Smaldone, Ian Wigmore, Felix Shvaiger, Arieh Don, Gabi Benhanokh
  • Publication number: 20210240621
    Abstract: A processing node of a storage system may determine that a host system is implementing a cache-slot aware, round-robin IO distribution algorithm (CA-RR). The processing node may be configured to determine when a sufficient number of sequential IOs will be received to consume a cache slot of the a processing node. If the processing node knows that the host system is implementing CA-RR, then, in response to determining the sufficient number, the processing node may send a communication informing the next processing node about the sequential cache slot hit. If the sequential IO operation(s) are read operation(s), the next processing node may prefetch at least a cache-slot worth of next consecutive data portions. If the sequential IO operation(s) are write operation(s), then the next processing node may request allocation of one or more local cache slots for the forthcoming sequential write operations.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 5, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Jack Fu, Jaeyoo Jung, Arieh Don
  • Publication number: 20210233003
    Abstract: Estimating maintenance for a storage system includes accessing a model that outputs time and materials estimates based on input configuration data, providing configuration data of the storage system to the model, and obtaining an estimate of maintenance time and materials based on the configuration data provided to the model. The model may be provided by a neural network, which may be a self-organized map. Weights of neurons of the self-organized map may be initialized randomly. The model may be initially configured using training data that may include an I/O load of the storage system, memory size of the storage system, a drive count of the storage system, and/or size and parameter information corresponding to hardware being added for the maintenance operation. The training data may include actual time and materials for prior storage system maintenance operations used for the training data. The model may be provided on the storage system.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 29, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Hagit Brit-Artzi, Malak Alshawabkeh, Arieh Don
  • Patent number: 11068581
    Abstract: Techniques for establishing connectivity may include receiving a first login command from an initiator port at a target port; and determining whether the first login command includes valid login authentication information for the initiator port that sent the first login command, and whether the initiator port identifier of the initiator port that sent the first login command includes a key. If the first login command does not include valid login authentication information and the initiator port identifier includes the key, first processing may be performed including: recording first information about the first login command in a registration table; and rejecting the first login command. A second login command may be received from the initiator port at the target port. If the second login command includes valid login authentication information for the initiator port, the second login command may be successfully processed to log the initiator port into the target port.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: July 20, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Violet S. Beckett, Narasimha R. Challa, Arieh Don
  • Publication number: 20210216228
    Abstract: An apparatus comprises at least one processing device that includes a processor coupled to a memory. The processing device is configured to control delivery of input-output (TO) operations from a host device to at least first and second storage systems over selected ones of a plurality of paths through a network, the first and second storage systems being arranged in an active-active configuration relative to one another. The processing device is further configured to identify one or more logical storage devices that are each accessible via at least first and second different ones of the paths to respective ones of the first and second storage systems, and to modify path selection for IO operations directed to the one or more identified logical storage devices relative to path selection for IO operations directed to one or more other logical storage devices. The processing device illustratively comprises at least a portion of the host device.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 15, 2021
    Inventors: Sanjib Mallick, Vinay G. Rao, Arieh Don
  • Publication number: 20210216459
    Abstract: In response to receiving a read metadata request from the host system for a data portion, the storage system may determine a status and location of the data portion, including determining whether the data portion is in a cache of the storage system. If the data portion is in the cache, the storage system may send a response that includes the data portion itself along with the status and location of the data portion. If the data portion is not in the cache, the storage system may send a response to the read metadata request that includes the status and location of the data portion, but not the data portion itself. The host system may be configured to determine whether the data portion has been returned with the metadata response, and if so, refrain from sending a separate data request, for example, to retrieve the data portion from cache.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 15, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Gabriel Benhanokh, Ian Wigmore, Arieh Don
  • Publication number: 20210216661
    Abstract: A storage system may assign a different encryption key to each logical storage unit (LSU) of a storage system. For each LSU, the encryption key of the LSU may be shared only with host systems authorized to access data of the LSU. In response to a read request for a data portion received from a host application executing on the host system, encryption metadata for the data portion may be accessed. If it is determined from the encryption metadata that the data portion is encrypted, the data encryption metadata for the data portion may be further analyzed to determine the encryption key for the data portion. The data may be retrieved from the storage system, for example, by performance of a direct read operation. The retrieved data may be decrypted, and the decrypted data may be returned to the requesting application.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 15, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Seema G. Pai, Gabriel Benhanokh, Ian Wigmore, Arieh Don, Alesia A. Tringale
  • Publication number: 20210216215
    Abstract: Data compression is performed on a storage system for which one or more host systems have direct access to data on the storage system. The storage system may compress the data for one or more logical storage units (LSUs) having data stored thereon, and may update compression metadata associated with the LSUs and/or the data portions thereof to reflect that the data is compressed. In response to a read request for a data portion received from a host application executing on the host system, compression metadata for the data portion may be accessed. If it is determined from the compression metadata that the data portion is compressed, the data compression metadata for the data portion may be further analyzed to determine how to decompress the data portion. The data portion may be retrieved and decompressed, and the decompressed data may be returned to the requesting application.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 15, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Ian Wigmore, Gabriel Benhanokh, Arieh Don, Alesia A. Tringale
  • Publication number: 20210208805
    Abstract: Techniques for configuring paths for transmitting I/O operations may include: configuring a first path over which logical devices are exposed over a first port of a data storage system to a second port of a host, wherein the logical devices include a first logical device having a first service level objective and a second logical device having a second service level objective denoting a lower service level than the first service level objective; determining whether there is a service level objective violation of the first service level for the first logical device; and responsive to determining there is a service level objective violation for the first logical device, performing first processing that exposes the first logical device and the second logical device over different ports of the data storage system. Masking information may indicate which logical devices are exposed over which data storage system ports to which host ports.
    Type: Application
    Filed: January 8, 2020
    Publication date: July 8, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Violet S. Beckett, Jaeyoo Jung, Arieh Don
  • Publication number: 20210203595
    Abstract: An apparatus comprises at least one processing device that includes a processor coupled to a memory. The processing device is configured to control delivery of input-output (IO) operations from a host device to at least one storage system over selected ones of a plurality of paths through a network, wherein the paths are associated with respective initiator-target pairs, the initiators being implemented on the host device and the targets being implemented on the storage system. The processing device is further configured to identify one or more of the plurality of paths that each exhibits at least a threshold amount of mismatch between a negotiated rate of its initiator and a negotiated rate of its target, and to modify path selection in the host device to at least temporarily avoid selecting the one or more identified paths. The processing device illustratively comprises at least a portion of the host device.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 1, 2021
    Inventors: Vinay G. Rao, Sanjib Mallick, Arieh Don
  • Patent number: 11050660
    Abstract: An illustrative embodiment includes a host device configured to communicate over a network with a storage system comprising a plurality of storage devices. The host device comprises a set of input-output queues and a multi-path input-output driver configured to select input-output operations from the set of input-output queues for delivery to the storage system over the network. The multi-path input-output driver is further configured to determine fabric identifiers for respective ones of a plurality of paths from the host device to the storage system, and to select particular ones of the paths for delivery of the input-output operations to the storage system based at least in part on the fabric identifiers. The fabric identifiers may be determined for the respective paths, for example, based at least in part on responses to a predetermined command sent over the paths by the multi-path input-output driver.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 29, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Vinay G. Rao, Subin George, Scott Rowlands, Arieh Don
  • Patent number: 11048638
    Abstract: A host system may be cache-slot aware such that the host system can distribute IOs to processing nodes on a storage system according to cache slot boundaries. A multi-path driver of the host system may determine the cache slot size from one or more communications exchanged with the storage system. The multi-path driver may transition between processing nodes according to slot cache slot boundaries. For IO operations having data portions smaller than the cache slot size, the MP driver may direct multiple IO operations to a same processing node until the collective size of data portions fills a cache slot. For IO operations having a data portion larger than the cache slot, the MP driver may divide the IO operation into sequential IO operations having data portions of a same size as a cache slot, and may transition between processing nodes for each IO operation or a multiple thereof.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: June 29, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Jack Fu, Jaeyoo Jung, Arieh Don
  • Publication number: 20210181965
    Abstract: An apparatus comprises at least one processing device comprising a processor coupled to a memory. The processing device is configured to control performance of a migration process in which a source logical storage device of a first storage system is migrated to a target logical storage device of a second storage system. In conjunction with the migration process, the processing device is further configured to update a management header of the target logical storage device to include an identifier of the target logical storage device, to store an identifier of the source logical storage device, and responsive to a read of the management header of the target logical storage device, to return the identifier of the source logical storage device in place of the identifier of the target logical storage device. Other illustrative embodiments include methods and computer program products.
    Type: Application
    Filed: December 11, 2019
    Publication date: June 17, 2021
    Inventors: Amit Pundalik Anchi, Vinay G. Rao, Sanjib Mallick, Arieh Don
  • Patent number: 11032373
    Abstract: An apparatus comprises at least one processing device that is configured to control delivery of input-output operations from a host device to a storage system over selected ones of a plurality of paths through a network, wherein the paths are associated with respective initiator-target pairs, the initiators being implemented on the host device and the targets being implemented on the storage system. The at least one processing device is further configured to identify a particular one of the initiators that comprises multiple virtual initiators having respective virtual identifiers, to determine a negotiated rate of the particular initiator, to determine a negotiated rate of a corresponding one of the targets, and to limit amounts of bandwidth utilized by the multiple virtual initiators in communicating with the corresponding target based at least in part on the negotiated rate of the particular initiator and the negotiated rate of the corresponding target.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: June 8, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Sanjib Mallick, Vinay G. Rao, Krishna Deepak Nuthakki, Arieh Don
  • Publication number: 20210157660
    Abstract: Techniques for memory management may include: allocating, from an allocation pool, buffers for logs used by processing cores; recording messages in the logs for the processing cores; responsive to filling a first buffer included in a first log used to record messages for a first of the plurality of processing cores, allocating a second buffer of the allocation pool for the first log; adding the second buffer to the first list of buffers for the first log; and adding the first buffer, that is included in the first list for the first log, to the allocation pool, wherein after adding the first buffer to the allocation pool, the first buffer is included in the first list of buffers for the first log and also included in the allocation pool. The buffers may be included in a distributed global memory portion of the same computing module as the processing cores.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 27, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Gabriel HERSHKOVITZ, Arieh Don, Michael R. Barber
  • Publication number: 20210157502
    Abstract: An apparatus comprises a host device configured to communicate over a network with first and second storage systems. The host device detects an association in at least one of the first and second storage systems between a source logical storage device of the first storage system and a target logical storage device of the second storage system, and responsive to the detected association, establishes a migration session in the host device for migration of the source logical storage device to the target logical storage device. The host device also obtains an indication from at least one of the first and second storage systems that a corresponding migration session has been activated in the first and second storage systems, and activates the previously-established migration session in the host device based at least in part on the obtained indication for migration of the source logical storage device to the target logical storage device.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Inventors: Vinay G. Rao, Sanjib Mallick, Arieh Don
  • Publication number: 20210157744
    Abstract: Techniques for processing I/O operations may include: issuing, by a process of an application on a host, an I/O operation; determining, by a driver on the host, that the I/O operation is a read operation directed to a logical device used as a log to log writes performed by the application, wherein the read operation reads first data stored at one or more logical addresses of the logical device; storing, by the driver, an I/O flag in the I/O operation, wherein the I/O flag has a first flag value denoting an expected read frequency associated with the read operation; sending the I/O operation from the host to the data storage system; and performing first processing of the I/O operation on the data storage system, wherein said first processing includes using the first flag value in connection with caching the first data in a cache of the data storage system.
    Type: Application
    Filed: November 22, 2019
    Publication date: May 27, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: GABRIEL BENHANOKH, Sanjib Mallick, Arieh Don
  • Publication number: 20210157740
    Abstract: A distributed cache is managed. In some embodiments, only a subset of a plurality of processing nodes may be designated as cache managers that manage the cache access history of a logical area, including having an exclusive right to control the eviction of data from cache objects of the logical area. In such embodiments, all of the processing nodes may collect cache access information, and communicate the cache access information to the cache managers. Some of the processing nodes that are not cache managers may collect cache access information from a plurality of the other non-cache managers. Each such processing node may combine this communicated cache access information with the cache access information of the processing node itself, sort the combined information per cache manager, and send the resulting sorted cache access information to the respective cache managers. The processing nodes may be arranged in a cache management hierarchy.
    Type: Application
    Filed: November 22, 2019
    Publication date: May 27, 2021
    Applicant: EMC IP Holding Company LLC
    Inventors: Gabriel Benhanokh, Arieh Don
  • Patent number: 11016783
    Abstract: An apparatus comprises a host device configured to communicate over a network with a storage system comprising a plurality of storage devices. The host device is further configured to execute multiple processes that generate input-output (IO) operations for delivery to the storage system. The host device comprises a multi-path input-output (MPIO) driver configured to store for each of one or more of the storage devices information specifying one or more of the processes executing on the host device that are permitted to access that storage device, and for each of at least a subset of the IO operations, to determine the particular storage device to which the IO operation is directed, to identify the process that generated the IO operation, and to control delivery of the IO operation based at least in part on whether or not the stored information indicates that the identified process is permitted to access the particular storage device.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: May 25, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Vinay G. Rao, Sanjib Mallick, Stephen D. Smaldone, Arieh Don
  • Patent number: 11012512
    Abstract: A host device comprises a processor coupled to a memory. The host device is configured, for each of a plurality of initiators of the host device from which write operations are sent to a storage system for processing, to repeatedly send to the storage system a command to obtain from the storage system write pressure information maintained by the storage system for that initiator, and responsive to the write pressure information obtained from the storage system for a corresponding one of the initiators indicating that the corresponding initiator is associated with a write pressure condition, to at least temporarily reduce a rate at which the write operations are sent from the corresponding initiator to the storage system. The operations of repeatedly sending the command, and at least temporarily reducing the rate, are illustratively performed by at least one multi-path input-output driver of a multi-path layer of the host device.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: May 18, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Sanjib Mallick, Krishna Deepak Nuthakki, Arieh Don