Abstract: A transistor structure is configured as a vertical type transistor. The transistor structure has a patterned electrode located between a gate electrode and a channel region of the transistor structure. The patterned electrode has one or more regions of discontinuity of the electrode. The patterned source electrode has at least two layers having at least a first and second barriers for injection of charge carriers into the channel region. The patterned electrode is configured such that a second layer having a second, higher, barrier for injection of charge carriers is configured to provide a physical barrier for flow of charge carriers from the electrode into the channel region.

Abstract: An electronic device is presented; the device comprises an electrode structure located in electrical contact with a semiconducting element. The electrode structure is configured with two or more groups of regions comprising regions of a first group having first charge injection properties and regions of a second group having second charge injection properties being lower than the first charge injection properties. The regions of the second group are configured to provide barrier for injection of charge carriers from regions of the first group into the semiconductor element to thereby allow tailoring of desired electronic properties of the device.

Abstract: An electronic device is presented; the device comprises an electrode structure located in electrical contact with a semiconducting element. The electrode structure is configured with two or more groups of regions comprising regions of a first group having first charge injection properties and regions of a second group having second charge injection properties being lower than the first charge injection properties. The regions of the second group are configured to provide barrier for injection of charge carriers from regions of the first group into the semiconductor element to thereby allow tailoring of desired electronic properties of the device.