Patents by Inventor Ariel S. Bentolila

Ariel S. Bentolila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High efficiency switching DC-DC regulator
    Patent number: 6492793
    Abstract: A synchronous switching DC-DC regulator uses the output switching node as the control reference for the main FET gate drive voltage limiting and the appropriate on-time gate drive FET as the controlled switch. The control reference provided by the output switching node times the main FET gate drive voltage setting process and supplies most of the energy necessary to turn on the main FETs. The energy is provided in part from an external inductor coupled to the output switching node.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: December 10, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Ariel S. Bentolila, Sisan Shen
  • System and method to detect synchronous switching regulator light load
    Patent number: 6310469
    Abstract: An efficient and practical system and method to determine when a switching DC-DC regulator is under a light load condition. The light load condition is determined by monitoring the switch node voltage to detect a zero-crossing voltage that is load dependent and occurs when the average output current minus half the switching current at the switch node is less than or equal to zero.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: October 30, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Ariel S. Bentolila, Sisan Shen
  • Method to switch MOSFETs using recycled, parasitic energy
    Patent number: 6285173
    Abstract: An energy efficient gate drive technique for binary push-pull MOSFET switching systems having a common switch node with inductive and capacitive elements connected to this common switch node. These energy storage elements on the common switch node can be parasitic in nature or discrete components. This technique recycles otherwise lost PMOS gate drive energy through the switch node, as a storage element, to the NMOS output FET.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Ariel S. Bentolila, Sisan Shen