Patents by Inventor ARIEL SLONIM

ARIEL SLONIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for instruction-based flop accounting
    Patent number: 10228938
    Abstract: An apparatus and method are described for floating point operation (FLOP) accounting. For example, one embodiment of a processor comprises: an instruction fetch unit to fetch instructions from system memory, the instructions including at least one masked vector floating point instruction to perform operations on a plurality of floating point data elements; a mask register to store a mask value associated with the masked vector floating point instruction; a decoder to decode the masked vector floating point instruction; and floating point operations (FLOP) accounting circuitry to read the mask register to determine a number of floating point operations to be performed during execution of the masked vector floating point instruction.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: March 12, 2019
    Assignee: Intel Corporation
    Inventors: Karthik Raman, Ariel Slonim, Ady Tal
  • APPARATUS AND METHOD FOR INSTRUCTION-BASED FLOP ACCOUNTING
    Publication number: 20180189065
    Abstract: An apparatus and method are described for floating point operation (FLOP) accounting. For example, one embodiment of a processor comprises: an instruction fetch unit to fetch instructions from system memory, the instructions including at least one masked vector floating point instruction to perform operations on a plurality of floating point data elements; a mask register to store a mask value associated with the masked vector floating point instruction; a decoder to decode the masked vector floating point instruction; and floating point operations (FLOP) accounting circuitry to read the mask register to determine a number of floating point operations to be performed during execution of the masked vector floating point instruction.
    Type: Application
    Filed: December 30, 2016
    Publication date: July 5, 2018
    Inventors: KARTHIK RAMAN, ARIEL SLONIM, ADY TAL