Abstract: A method for switching a power supply for low current standby operation includes deactivating a first supply connected to a first supply node, in response to activating an enable signal. A second supply is changed to a low power mode in response to activating the enable signal, wherein the second supply is connected to a second supply node. The first supply node is connected to the second supply node in response to a first voltage of the first supply node being less than or equal to a positive offset above a second voltage of the second supply node. The first supply node is disconnected from the second supply node in response to deactivating the enable signal, wherein the first supply node is disconnected at a rate preventing the first supply node from discharging below a first supply minimum voltage.

Abstract: A method for switching a power supply for low current standby operation includes deactivating a first supply connected to a first supply node, in response to activating an enable signal. A second supply is changed to a low power mode in response to activating the enable signal, wherein the second supply is connected to a second supply node. The first supply node is connected to the second supply node in response to a first voltage of the first supply node being less than or equal to a positive offset above a second voltage of the second supply node. The first supply node is disconnected from the second supply node in response to deactivating the enable signal, wherein the first supply node is disconnected at a rate preventing the first supply node from discharging below a first supply minimum voltage.

Abstract: Described are examples for populating input fields on an application. A form input field of a form rendered by an application can be detected by the application, or another application. A data class associated with the form input field can be determined, and an anticipatory response for populating the form input field can be determined based on the data class and input from one or more different applications. The form input field of the form can be populated, via the application, with the anticipatory response.

Abstract: Described herein is a method of web browser enabled annotation sharing comprising receiving information associated with the annotation, creating an anchored annotation based upon the received information associated with the annotation; and storing the anchored annotation. Further described herein is a method of retrieving an anchored annotation comprising receiving a request for an anchored annotation associated with particular content, retrieving anchored annotations associated with the particular content, filtering the retrieved anchored annotations; and, providing the filtered retrieved anchored annotations (e.g., to user(s) viewing the same content).

Abstract: Described herein is a method of web browser enabled annotation sharing comprising receiving information associated with the annotation, creating an anchored annotation based upon the received information associated with the annotation; and storing the anchored annotation. Further described herein is a method of retrieving an anchored annotation comprising receiving a request for an anchored annotation associated with particular content, retrieving anchored annotations associated with the particular content, filtering the retrieved anchored annotations; and, providing the filtered retrieved anchored annotations (e.g., to user(s) viewing the same content).

Abstract: A method and circuit capable of handling skew between a clock and data signal up to +/? one half bit on a random input data pattern. A digital algorithm cycles through each data bit and individually deskews that bit by detecting data transitions in a first sampling region and in a second sampling region and determining a difference between a number of transitions in the first sampling region and a number of transitions in the second sampling region. The sampling regions and a deskew timing signal may then be incremented or decremented based on a comparison of the computed difference to a predetermined constant. If no transitions occur on a particular bit, the algorithm times out leaving the deskew timing signal in the original position. When analysis of a final bit of a channel is completed, the algorithm begins monitoring and analyzing the first bit of another channel.

Abstract: A data serializer includes a data aligner, two N-bit shift registers, a 2-1 multiplexer, and a driver, wherein N is the number of parallel input data bits. Data is received and aligned by the data aligner, which is arranged to drive odd and even data lines to a respective one of the N-bit shift registers. One N-bit shift register is arranged to operate with a clock that is 180 degrees out of phase with respect to the other N-bit shift register. The frequency of the clock for each N-bit shift register is related to an input clock frequency by a factor of N/2. The multiplexer is arranged to alternate the selection of the N-bit shift registers to provide the output signal. The output of the multiplexer corresponds to a high-speed serial data stream that can be provided to a driver such as LVDS, DVI, PPDS or RSDS drivers.

Abstract: An improved memory for graphics displays includes an improved memory cell. Data may be written and read from the single bit cell simultaneously, eliminating the need for additional memory circuits to service an N column driver for a display. Additionally, the architecture of the memory allows for a signal input port for writing the data to the cell while allowing for multiple parallel output ports for reading the data. The unique architecture eliminates the need for addressing logic and refresh circuitry for display applications.

Abstract: A data/clock deskewing methodology uses a delay-locked loop (DLL) circuit. The DLL circuit generates a number of clock phases in response to an input clock, where each clock phase is delayed relative to the input clock signal. The clock phases are used to sample data from a data line. The sampled data is checked against a preamble pattern (a sequence of known data). A digital deskew control block selects one of the clock phases after analyzing the results of preamble pattern check such that subsequently received data is sampled with the appropriately selected clock phase.