Abstract: An integrated multi-port generator-rectifier device includes multiple passive output ports provided from a plurality of passive-rectifier windings on a common, single magnetic structure. The passive-rectifier windings interact with a plurality of magnetic poles. Coils in the passive rectifier windings are serially connected. Each of the passive rectifier windings has a pitch as that is a fraction of magnet pole pitch and a pattern to magnetically decouple back emf phases of the separate rectifiers. The device further includes an active port provided by an active rectifier.

Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).

Abstract: A generator-rectifier system and grid interface includes an active rectifier that accepts an input from an ac port of a multi-port permanent magnet synchronous generator. Passive rectifiers are connected to the others of the plurality of ac ports. Connections provide outputs of the active and passive rectifiers. A first converter operates at a fixed duty ratio driven by the outputs to interface with a dc grid or at a low grid frequency switching waveform to create a grid frequency ac output to interface with an ac grid. A second converter is connected the output of the active rectifier, and is controlled at a variable duty ratio to interface with the dc grid or an above-grid frequency switching waveform to create an above-grid frequency ac waveform to interface with an ac grid. Connections provide a serial stack of outputs of the first and second converters.

Abstract: Methods and systems for providing multipath connectivity intelligence is disclosed. The system may include one or more processors; and a memory storing instructions that cause the one or more processors to perform the steps comprising: connecting, by an intelligence interface, an agent to an intelligence service, transmitting, by the intelligence interface, information associated with the agent to the intelligence service, and receiving, by the intelligence interface, one or more connectivity options associated with the agent from the intelligence service. The agent may be a logical entity comprising one or more functions configured to manage multipath connectivity, and the one or more connectivity options may be used by one or more networks or one or more device functions for multipath management and scheduling.

Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).

Abstract: An induction motor includes a plurality of flux linkage configurations that control current to drive relative movement between a rotor and a stator. Each flux configuration powers a different number of poles. A controller is configured to droop switch flux linkage configurations by ramping up torque in a new configuration h1 at the same rate as torque decay by decaying flux from a previous configuration h2. Multiple flux configurations can also be powered during steady state. A method for smoothing torque transitions receives a command to change from one of a plurality of flux configurations to another of the plurality of the flux configurations. Torque is ramped up in the another flux configuration at the same rate as decaying torque in the one of the plurality of flux configurations.

Abstract: An apparatus and method for providing efficient floor planning, power, and performance tradeoffs of memory accesses. A dual read port and single write port memory bit cell uses two asymmetrical read access circuits for conveying stored data on two read bit lines. The two read bit lines are pre-charged to different voltage reference levels. The layout of the memory bit cell places the two read bit lines on an opposed edge from the single write bit line. The layout uses a dummy gate placed over both p-type diffusion and n-type diffusion between the edges. The layout has a same number of p-type transistors as n-type transistors despite using asymmetrical read access circuits. The layout also has a contacted gate pitch that is one more than the number of p-type transistors.

Abstract: An apparatus and method for providing efficient floor planning, power, and performance tradeoffs of memory accesses. Adjacent bit cells in a column of an array use a split read port such that the bit cells do not share a read bit line while sharing a write bit line. The adjacent bit cells include asymmetrical read access circuits that convey data stored by latch circuitry of a corresponding bit cell to a corresponding read bit line. The layout of adjacent bit cells provides a number of contacted gate pitches per bit cell that is less than a sum of the maximum number of metal gates in layout of each of the adjacent bit cells divided by the number of adjacent bit cells.

Abstract: The disclosed embodiments provide a method for interconnecting a plurality of networks, including a first network, with a second network via an interworking gateway (IWG). The method may comprise receiving a request from the first network for a user in the first network to access at least one service or application available in the second network, determining at least one criteria associated with the second network to enforce for the user in the first network, and enforcing the at least one criteria for communications associated with the user between the first and second networks. The IWG may be a cloud-based service that is configured to perform the aforementioned steps. The IWG may also be configured to be dynamically scalable to support multiple networks in the plurality of networks requesting interconnection with the second network.

Abstract: A generator-rectifier system and grid interface includes an active rectifier configured to accept an input from one of a plurality of ac ports of a multi-port permanent magnet synchronous generator. Passive rectifiers are connected to the others of the plurality of ac ports. Connections provide outputs of the active rectifier and the passive rectifiers. A first converter is controlled at a fixed duty ratio driven by the outputs to interface with a dc grid or at a low grid frequency switching waveform to create a grid frequency ac output to interface with an ac grid. A second converter is connected the output of the active rectifier, the second converter being controlled at a variable duty ratio to interface with the dc grid or an above grid frequency switching waveform to create an above grid frequency ac waveform to interface with an ac grid. Connections provide a serial stack of outputs of the first and second converters.

Abstract: The disclosed embodiments provide a method for interconnecting a plurality of networks, including a first network, with a second network via an interworking gateway (IWG). The method may comprise receiving a request from the first network for a user in the first network to access at least one service or application available in the second network, determining at least one criteria associated with the second network to enforce for the user in the first network, and enforcing the at least one criteria for communications associated with the user between the first and second networks. The IWG may be a cloud-based service that is configured to perform the aforementioned steps. The IWG may also be configured to be dynamically scalable to support multiple networks in the plurality of networks requesting interconnection with the second network.

Abstract: An integrated multi-port generator-rectifier device includes multiple passive output ports provided from a plurality of passive-rectifier windings on a common, single magnetic structure. The passive-rectifier windings interact with a plurality of magnetic poles. Coils in the passive rectifier windings are serially connected. Each of the passive rectifier windings has a pitch as that is a fraction of magnet pole pitch and a pattern to magnetically decouple back emf phases of the separate rectifiers. The device further includes an active port provided by an active rectifier.

Abstract: Methods and systems for providing multipath connectivity intelligence is disclosed. The system may include one or more processors; and a memory storing instructions that cause the one or more processors to perform the steps comprising: connecting, by an intelligence interface, an agent to an intelligence service, transmitting, by the intelligence interface, information associated with the agent to the intelligence service, and receiving, by the intelligence interface, one or more connectivity options associated with the agent from the intelligence service. The agent may be a logical entity comprising one or more functions configured to manage multipath connectivity, and the one or more connectivity options may be used by one or more networks or one or more device functions for multipath management and scheduling.

Abstract: The disclosed embodiments provide a method for interconnecting a plurality of networks, including a first network, with a second network via an interworking gateway (IWG). The method may comprise receiving a request from the first network for a user in the first network to access at least one service or application available in the second network, determining at least one criteria associated with the second network to enforce for the user in the first network, and enforcing the at least one criteria for communications associated with the user between the first and second networks. The IWG may be a cloud-based service that is configured to perform the aforementioned steps. The IWG may also be configured to be dynamically scalable to support multiple networks in the plurality of networks requesting interconnection with the second network.

Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).

Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).

Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).

Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).

Abstract: An apparatus and method for providing efficient floor planning, power, and performance tradeoffs of memory accesses. Adjacent bit cells in a column of an array use a split read port such that the bit cells do not share a read bit line while sharing a write bit line. The adjacent bit cells include asymmetrical read access circuits that convey data stored by latch circuitry of a corresponding bit cell to a corresponding read bit line. The layout of adjacent bit cells provides a number of contacted gate pitches per bit cell that is less than a sum of the maximum number of metal gates in layout of each of the adjacent bit cells divided by the number of adjacent bit cells.

Abstract: An apparatus and method for providing efficient floor planning, power, and performance tradeoffs of memory accesses. A dual read port and single write port memory bit cell uses two asymmetrical read access circuits for conveying stored data on two read bit lines. The two read bit lines are pre-charged to different voltage reference levels. The layout of the memory bit cell places the two read bit lines on an opposed edge from the single write bit line. The layout uses a dummy gate placed over both p-type diffusion and n-type diffusion between the edges. The layout has a same number of p-type transistors as n-type transistors despite using asymmetrical read access circuits. The layout also has a contacted gate pitch that is one more than the number of p-type transistors.