Patents by Inventor Arik Gubeskys

Arik Gubeskys has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170093530
    Abstract: A wireless local area network (WLAN) may utilize an enhanced header for LTE-CW transmissions to increase utilization of the shared spectrum. In one example, a first device may generate a header that is identifiable to other devices using a shared spectrum, scramble, in the time domain, long training symbols according to a scrambling code that is specific to the first device, and transmit an enhanced header that includes the generated header and the scrambled long training symbols. The first device may also introduce a data region following the long training symbols to the enhanced header to create an enhanced packet. A second device may receive the enhanced packet and descramble the long training symbols based at least in part on the scrambling code that is specific to the first device to determine a channel estimate for the communication channel between the first device and the second device.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: Shrinivas Kudekar, Xinzhou Wu, Junyi Li, Arik Gubeskys, Yehonatan Dallal
  • Publication number: 20140269987
    Abstract: Methods, systems, and apparatuses are described for performing combined crest factor reduction and interpolation on a signal to be transmitted on a wireless channel. A sample based on a signal to be transmitted on a wireless channel may be received at each stage of a plurality of cascaded stages in a transmitter of a wireless device. The sample at each of the stages may be clipped to produce a clipped version of the sample for that stage. The clipped version of the sample for each of the stages may be upsampled to produce an upsampled and clipped version of the sample for that stage. The upsampled and clipped version of the sample for each of the stages may be processed with a filter implementing a combination of crest factor reduction filtering and interpolation filtering of the upsampled and clipped version of the sample for that stage.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 18, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Arik Gubeskys, Assaf Touboul
  • Patent number: 8006113
    Abstract: A system that includes at least one component adapted to execute at least one application, characterized by including a controller adapted to receive at least one load indication of at least one component of the system and to selectively alter at least one control parameter of a voltage and clock frequency management scheme; whereas the system is adapted to apply the voltage and clock frequency management scheme. A method for controlling voltage level and clock frequency supplied to a system, the method includes receiving at least one load indication of at least one component of the system; characterized repeating the stages of: selectively altering at least one control parameter of a voltage and clock frequency management scheme; and applying the voltage and clock frequency management scheme.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: August 23, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Anton Rozen, Arik Gubeskys, Michael Priel
  • Patent number: 7978757
    Abstract: A configurable receiver and a method for configuring a receiver, the method includes: (i) evaluating multiple nonzero taps allocations, wherein each nonzero taps allocation evaluation includes: (i.a) allocating nonzero taps between multiple sparse equalizers, wherein different sparse equalizers are expected to equalize signals transmitted over different channels; wherein each channel is associated with an information source out of multiple information sources and with a receiving antenna out of multiple receiving antennas; wherein the number of nonzero taps is bounded by a upper limit; and (i.b) calculating multiple channel reception parameters of the multiple channels in response to the nonzero taps allocation; and (ii) configuring the receiver in response to a comparison between reception parameters obtained during different nonzero taps allocations.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: July 12, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Gideon Kutz, Amir Chass, Arik Gubeskys
  • Patent number: 7940738
    Abstract: A method of processing a code division multiple access signal comprises receiving a CDMA signal; processing the received CDMA signal with a CDMA detector; and extracting control channel information from the processed signal. The extracted control channel information is used to equalize a subsequent received CDMA signal, to make estimation of equalizer coefficients more reliable and increasing average data throughput.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: May 10, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Arik Gubeskys, Amir Chass
  • Patent number: 7630429
    Abstract: Known chip equalizers for Wideband-Code Division Multiple Access (W-CDMA) employ a co-efficient calculator that implements a Minimum Mean Square Error (MMSE) solution to a least squares technique for obtaining equalizer coefficients in response to receipt of a pilot sequence. However, this solution results in an undesirably high processing overhead in downlink receivers operating in a W-CDMA communications system. Consequently, the present invention provides a computationally simpler technique to calculate equalizer coefficients by implementing a minimum-norm solution to the least squares problem.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: December 8, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Arik Gubeskys, Amir Chass
  • Publication number: 20090100276
    Abstract: A system that includes at least one component adapted to execute at least one application, characterized by including a controller adapted to receive at least one load indication of at least one component of the system and to selectively alter at least one control parameter of a voltage and clock frequency management scheme; whereas the system is adapted to apply the voltage and clock frequency management scheme. A method for controlling voltage level and clock frequency supplied to a system, the method includes receiving at least one load indication of at least one component of the system; characterized repeating the stages of: selectively altering at least one control parameter of a voltage and clock frequency management scheme; and applying the voltage and clock frequency management scheme.
    Type: Application
    Filed: October 27, 2005
    Publication date: April 16, 2009
    Applicant: FREESCALE SEIMICONDUCTOR, INC.
    Inventors: Anton Rozen, Arik Gubeskys, Michael Priel
  • Publication number: 20080267156
    Abstract: A method of processing a code division multiple access signal comprises receiving a CDMA signal; processing the received CDMA signal with a CDMA detector; and extracting control channel information from the processed signal. The extracted control channel information is used to equalize a subsequent received CDMA signal, to make estimation of equalizer coefficients more reliable and increasing average data throughput.
    Type: Application
    Filed: May 23, 2005
    Publication date: October 30, 2008
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Arik Gubeskys, Amir Chass
  • Publication number: 20050271124
    Abstract: Known chip equalizers for Wideband-Code Division Multiple Access (W-CDMA) employ a co-efficient calculator that implements a Minimum Mean Square Error (MMSE) solution to a least squares technique for obtaining equalizer coefficients in response to receipt of a pilot sequence. However, this solution results in an undesirably high processing overhead in downlink receivers operating in a W-CDMA communications system. Consequently, the present invention provides a computationally simpler technique to calculate equalizer coefficients by implementing a minimum-norm solution to the least squares problem.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 8, 2005
    Inventors: Arik Gubeskys, Amir Chass
  • Publication number: 20010054170
    Abstract: A device and method for performing SISO coding in a parallel manner. Forward metrics and backward metrics computed in parallel. When forward metrics of nodes of a stage are computed and backward metrics of nodes of an adjacent stage were previously computed, the computation of forward metrics is integrated with the computation of a lambda from the stage to the adjacent stage, wherein when backward metrics of nodes of a stage are computed and the forward metrics of the nodes of an adjacent stage were previously computed, the computation of backward metrics is integrated with the computation of lambda from the stage to the adjacent stage.
    Type: Application
    Filed: January 5, 2001
    Publication date: December 20, 2001
    Inventors: Amir Chass, Arik Gubeskys