Patents by Inventor Arik Shmayovitsh

Arik Shmayovitsh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7770142
    Abstract: A method for modeling power management in an integrated circuit (IC) includes: specifying a circuit design and a power architecture for the IC, the power architecture including a plurality of power domains for specifying power levels in different portions of the IC; determining a testbench for simulating the IC and a verification plan for evaluating simulation results; using the testbench to simulate variations in power levels of the power domains of the IC; and using the verification plan to evaluate the simulation results for the power domains of the IC.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: August 3, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Arik Shmayovitsh, John Decker, Dan Leibovich