Patents by Inventor Arindam Basu

Arindam Basu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230339363
    Abstract: A non-pressurized fluid reservoir for a vehicle coolant system includes a bottle configured to store fluid. The bottle has a neck defining an inner circumferential surface that is devoid of threads. The reservoir further includes a cap having a lid and a shank extending from the lid. The shank has an outer circumferential surface and with a spiral ramp supported on the outer circumferential surface to encircle a portion of the shank. The shank is receivable within the neck with the spiral ramp adjacent to the inner circumferential surface to mitigate fluid leaks through the neck.
    Type: Application
    Filed: April 20, 2022
    Publication date: October 26, 2023
    Inventors: Robert Alex Mitchell, Arindam Basu, Erik Thomas Andersen, Charles Wyman, Michael Joseph Giunta
  • Patent number: 10311375
    Abstract: An analog implementation is proposed of an adaptive signal processing model of a kind requiring a plurality of randomly-set variables. In particular, following a digital to analog conversion of a digital input signal, analog processing is used to transform the data input to the model into data which is subsequently processed by an adaptively-created layer of the model. In the analog processing, multiplication operations involving the randomly-set variables are performed by analog circuitry in which the randomly-set variables are the consequence of inherent tolerances in electrical components. This eliminates the need for the randomly-set variables to be implemented in some other way, for example as random variables stored in memory.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: June 4, 2019
    Assignee: NANYANG TECHNOLOGICAL UNIVERSITY
    Inventors: Arindam Basu, Enyi Yao, Yi Chen
  • Publication number: 20180356771
    Abstract: A computer system is proposed including an adaptive signal processing model of a kind in which a multiplicative section, such as a VLSI integrated circuit, processes data input to the model, using hidden neurons and randomly-set variables, and an adaptive output layer processes the outputs of the multiplicative section using variable parameters. Controllable switching circuitry is proposed to control which data inputs are fed to which hidden neurons, to reduce the number of hidden neurons required and increase the effective number of data inputs. An algorithm is proposed to selectively disable unnecessary hidden neurons. Normalisation, and a winner-take all stage, may be provided at the hidden layer output.
    Type: Application
    Filed: September 16, 2016
    Publication date: December 13, 2018
    Inventors: Arindam BASU, Yi CHEN, Subhrajit ROY, Enyi YAO, Aakash Shantaram PATIL
  • Patent number: 10127016
    Abstract: A magnetic random number generator is disclosed. The magnetic random number generator comprises: a) a Hall cross structure comprising at least one magnetic nanowire with perpendicular magnetic anisotropy; b) an in-plane pulsed current generator operable to generate stochastic nucleation of domain walls (DWs) in the Hall cross structure; and c) a sensor configured to measure a parameter of the Hall cross structure upon DW nucleation, wherein said parameter has a value representing a random number. A greater number of Hall cross structures may be employed to generate a random number having a greater number of bits.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: November 13, 2018
    Assignee: NANYANG TECHNOLOGICAL UNIVERSITY
    Inventors: Pankaj Sethi, Chandrasekhar Murapaka, Wen Siang Lew, Arindam Basu
  • Publication number: 20170212728
    Abstract: A magnetic random number generator is disclosed. The magnetic random number generator comprises: a) a Hall cross structure comprising at least one magnetic nanowire with perpendicular magnetic anisotropy; b) an in-plane pulsed current generator operable to generate stochastic nucleation of domain walls (DWs) in the Hall cross structure; and c) a sensor configured to measure a parameter of the Hall cross structure upon DW nucleation, wherein said parameter has a value representing a random number. A greater number of Hall cross structures may be employed to generate a random number having a greater number of bits.
    Type: Application
    Filed: January 20, 2017
    Publication date: July 27, 2017
    Inventors: Pankaj SETHI, Chandrasekhar MURAPAKA, Wen Siang LEW, Arindam BASU
  • Publication number: 20160110643
    Abstract: An analog implementation is proposed of an adaptive signal processing model of a kind requiring a plurality of randomly-set variables. In particular, following a digital to analog conversion of a digital input signal, analog processing is used to transform the data input to the model into data which is subsequently processed by an adaptively-created layer of the model. In the analog processing, multiplication operations involving the randomly-set variables are performed by analog circuitry in which the randomly-set variables are the consequence of inherent tolerances in electrical components. This eliminates the need for the randomly-set variables to be implemented in some other way, for example as random variables stored in memory.
    Type: Application
    Filed: October 16, 2015
    Publication date: April 21, 2016
    Inventors: Arindam BASU, Enyi YAO, Yi CHEN
  • Patent number: 7965559
    Abstract: The present invention describes systems and methods for improving the programming of floating-gate transistors. An exemplary embodiment of the present invention provides a floating-gate transistor programming system including an array of floating-gate transistors and a measuring circuit comprising a logarithmic transimpedance amplifier and an analog-to-digital converter. Furthermore, the floating-gate transistor programming system includes an injecting circuit comprising a digital-to-analog converter, wherein the pulsing circuit can inject charge into each of the floating-gate transistors and the measuring circuit can measure a present charge value in one of the plurality of floating-gate transistors.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: June 21, 2011
    Assignee: Georgia Tech Research Corporation
    Inventors: Paul Hasler, Arindam Basu
  • Publication number: 20090323425
    Abstract: The present invention describes systems and methods for improving the programming of floating-gate transistors. An exemplary embodiment of the present invention provides a floating-gate transistor programming system including an array of floating-gate transistors and a measuring circuit comprising a logarithmic transimpedance amplifier and an analog-to-digital converter. Furthermore, the floating-gate transistor programming system includes an injecting circuit comprising a digital-to-analog converter, wherein the pulsing circuit can inject charge into each of the floating-gate transistors and the measuring circuit can measure a present charge value in one of the plurality of floating-gate transistors.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 31, 2009
    Applicant: Georgia Tech Research Corporation
    Inventors: Paul Hasler, Arindam Basu