Abstract: Systems and methods are described herein for manufacturing high-index, low-absorption materials for use in visible light optical metasurfaces. Methods of manufacturing or forming hydrogenated amorphous silicon (a-Si:H), silicon-rich nitride (SRN), and hydrogenated silicon-rich nitride (SRN:H) are described herein that exhibit high indices of refraction and low extinction coefficients for visible wavelengths of optical radiation. Optical metasurfaces, including optical metalenses and waveguide couplers, are described herein that utilize the a-Si:H, SRN, and/or SRN:H materials.

Abstract: Systems and methods are described herein for manufacturing high-index, low-absorption materials for use in visible light optical metasurfaces. Methods of manufacturing or forming hydrogenated amorphous silicon (a-Si:H), silicon-rich nitride (SRN), and hydrogenated silicon-rich nitride (SRN:H) are described herein that exhibit high indices of refraction and low extinction coefficients for visible wavelengths of optical radiation. Optical metasurfaces, including optical metalenses and waveguide couplers, are described herein that utilize the a-Si:H, SRN, and/or SRN:H materials.

Abstract: This disclosure provides various examples and methods of manufacturing metasurface couplers, including slanted grating metasurface couplers characterized by a plurality of parallel, elongated angled ridges. In some examples, a transmission-mode metasurface coupler with a slanted grating is used to couple optical radiation into a waveguide. In some examples, a reflection-mode metasurface coupler with a slanted grating and reflective layer is used to couple optical radiation into a waveguide.

Abstract: This disclosure provides various examples and methods of manufacturing metasurface couplers, including slanted grating metasurface couplers characterized by a plurality of parallel, elongated angled ridges. In some examples, a transmission-mode metasurface coupler with a slanted grating is used to couple optical radiation into a waveguide. In some examples, a reflection-mode metasurface coupler with a slanted grating and reflective layer is used to couple optical radiation into a waveguide.

Abstract: This disclosure provides various examples and methods of manufacturing metasurface couplers, including slanted grating metasurface couplers characterized by a plurality of parallel, elongated angled ridges. In some examples, a transmission-mode metasurface coupler with a slanted grating is used to couple optical radiation into a waveguide. In some examples, a reflection-mode metasurface coupler with a slanted grating and reflective layer is used to couple optical radiation into a waveguide.

Abstract: This disclosure provides various examples and methods of manufacturing metasurface couplers, including slanted grating metasurface couplers characterized by a plurality of parallel, elongated angled ridges. In some examples, a transmission-mode metasurface coupler with a slanted grating is used to couple optical radiation into a waveguide. In some examples, a reflection-mode metasurface coupler with a slanted grating and reflective layer is used to couple optical radiation into a waveguide.

Abstract: Various embodiments and configurations of optical imaging systems are described herein that utilize a metalens for narrowband deflection of target frequencies. For example, one embodiment of a multifrequency metalens includes an in-plane spatially multiplexed array of frequency-specific nanopillars or frequency-specific rows/columns of nanopillars that are intermingled with one another. In other embodiments, transmissive metalenses and/or reflective metalenses are tuned to focus color-separated visible light into red, green, and blue (RGB) channels of a digital image sensor.

Abstract: Described embodiments can be used in semiconductor manufacturing and employ materials with high and low polish rates to help determine a precise polish end point that is consistent throughout a wafer and that can cease polishing prior to damaging semiconductor elements. The height of the low polish rate material between the semiconductor elements is used as the polishing endpoint. Because the low polish rate material slows down the polishing process, it is easy to determine an end point and avoid damage to the semiconductor elements. An additional or alternative etch end point can be a thin layer of material that provides a very clear spectroscopy signal when it has been exposed, allowing the etch process to cease.

Abstract: Described embodiments can be used in semiconductor manufacturing and employ materials with high and low polish rates to help determine a precise polish end point that is consistent throughout a wafer and that can cease polishing prior to damaging semiconductor elements. The height of the low polish rate material between the semiconductor elements is used as the polishing endpoint. Because the low polish rate material slows down the polishing process, it is easy to determine an end point and avoid damage to the semiconductor elements. An additional or alternative etch end point can be a thin layer of material that provides a very clear spectroscopy signal when it has been exposed, allowing the etch process to cease.

Abstract: Described embodiments can be used in semiconductor manufacturing and employ materials with high and low polish rates to help determine a precise polish end point that is consistent throughout a wafer and that can cease polishing prior to damaging semiconductor elements. The height of the low polish rate material between the semiconductor elements is used as the polishing endpoint. Because the low polish rate material slows down the polishing process, it is easy to determine an end point and avoid damage to the semiconductor elements. An additional or alternative etch end point can be a thin layer of material that provides a very clear spectroscopy signal when it has been exposed, allowing the etch process to cease.

Abstract: Described embodiments can be used in semiconductor manufacturing and employ materials with high and low polish rates to help determine a precise polish end point that is consistent throughout a wafer and that can cease polishing prior to damaging semiconductor elements. The height of the low polish rate material between the semiconductor elements is used as the polishing endpoint. Because the low polish rate material slows down the polishing process, it is easy to determine an end point and avoid damage to the semiconductor elements. An additional or alternative etch end point can be a thin layer of material that provides a very clear spectroscopy signal when it has been exposed, allowing the etch process to cease.

Abstract: A thin film of material on a substrate is formed in a continuous process of a physical vapor deposition system, in which material is deposited during a variable temperature growth stage having a first phase conducted below a temperature of about 500° C., and material is continuously deposited as the temperature changes for the second phase to above about 800° C.

Abstract: An embedded sensor or other desired device is provided within a completed structure through a solid-state bonding process or through a dynamic bonding process. The embedded sensor or other desired device is provided on a substrate through any known or later-developed method. A cover is then bonded to the substrate using a solid-state bonding process or a dynamic bonding process. The solid-state bonding process may include providing heat and pressure to the substrate and the cover to bond the substrate and the cover together. The dynamic bonding process may include heating a bonding agent and distributing the heated bonding agent between the substrate and cover to bond the substrate and the cover together.

Abstract: An embedded sensor or other desired device is provided within a completed structure through a solid-state bonding process (e.g., by diffusion bonding) and/or through a dynamic bonding process (e.g., by brazing). The embedded sensor or other desired device is provided on a substrate through any know or later-developed method (e.g., a photolithography or conductive ink printing process). A cover is then bonded to the substrate using a solid-state bonding process and/or a dynamic bonding process. The solid-state bonding process and/or dynamic bonding process may include providing heat and/or pressure to the substrate, the cover and/or a bonding agent (e.g., a filler metal or alloy) to bond the substrate and the cover together.

Abstract: Fabricating a microelectronics grade metal substrate comprises forming the metal substrate on a sacrificial substrate. An adhesion layer can be deposited on or over the surface of the sacrificial substrate. A seed layer of the metal can be deposited on or over the adhesion layer. The metal material can be deposited on the seed layer by electroplating or other low-temperature, low-stress process to form a microelectronics-grade metal substrate. Thin film sensors and/or other microelectronic devices, followed by appropriate insulating layer(s), may be fabricated on or over the sacrificial substrate before forming the metal substrate. The sacrificial silicon substrate can then be etched away, leaving the microelectronics-grade metal substrate, and possibly the microelectronics device.

Abstract: Fabricating a microelectronics grade metal substrate comprises forming the metal substrate on a sacrificial substrate. An adhesion layer can be deposited on or over the surface of the sacrificial substrate. A seed layer of the metal can be deposited on or over the adhesion layer. The metal material can be deposited on the seed layer by electroplating or other low-temperature, low-stress process to form a microelectronics-grade metal substrate. Thin film sensors and/or other microelectronic devices, followed by appropriate insulating layer(s), may be fabricated on or over the sacrificial substrate before forming the metal substrate. The sacrificial silicon substrate can then be etched away, leaving the microelectronics-grade metal substrate, and possibly the microelectronics device.

Abstract: Fabricating a microelectronics grade metal substrate comprises forming the metal substrate on a sacrificial substrate. An adhesion layer can be deposited on or over the surface of the sacrificial substrate. A seed layer of the metal can be deposited on or over the adhesion layer. The metal material can be deposited on the seed layer by electroplating or other low-temperature, low-stress process to form a microelectronics-grade metal substrate. Thin film sensors and/or other microelectronic devices, followed by appropriate insulating layer(s), may be fabricated on or over the sacrificial substrate before forming the metal substrate. The sacrificial silicon substrate can then be etched away, leaving the microelectronics-grade metal substrate, and possibly the microelectronics device.