Abstract: A field-effect photo-transistor, being a three-terminal photosensing electrical device, based on integrated metal oxide semiconductor (MOS) technology. The device features a high output impedance which makes it particularly suitable as a photosensor for active pixel imaging arrays. Unlike the bipolar photo-transistor, which is a device well known in the art, the field-effect phototransistor is more compatible with MOS VLSI (Very Large Scale Integration) technology by inherently being a unipolar type device. Active pixel imaging arrays based on the disclosed invention can be integrated on the same semiconductor substrate with conventional digital or mixed signal processing functions to produce single-chip image processors for video or still picture cameras.

Abstract: An arrangement for protecting inductive load switching transistors during overvoltage conditions is disclosed. The arrangement comprises a Zener diode coupled between the collector and base of the switching transistor, where the Zener diode will break down during inductive load-created overvoltage conditions and turn on the transistor. A major portion of the surge current will then flow through the activated transistor. In a particular integrated circuit realization of the arrangement, the Zener diode is formed in the same semiconductor area as the transistor by extending a portion of the base diffusion region downward to contact the buried collector region.

Abstract: A capacitor-resistor-capacitor (CRC) element for active filter realization, which is fully integrable and compatible with MOS technology, is described. The incorporation of the CRC element in a semiconductor integrated circuit active filter also is described. The structure of the CRC filter element is closely analogous to a depletion mode MOS field effect device, except that the channel zone 26 is doped to a level which substantially precludes conductivity modulation at the usual operating voltages. However, the doping level is such as to enable the use of the channel zone as a semiconductor resistance element. Thus, the N-channel CRC element realized in the NMOS technology comprises a first capacitance composed of the gate 27, gate dielectric 38, and resistive channel 26, paralleled by the resistive channel 26 itself constituting a resistor, and then the underlying PN junction capacitance between the N-type resistive channel 26 and the underlying P-type semiconductor body portion 21.

Abstract: A version of integrated injection logic is disclosed in which both the switching transistor and the current source transistor are of the vertical type and in which the logic gates are fabricated in the same semiconductor integrated chip with linear circuits which are based on the complementary bipolar integrated circuit technology.The injection logic gate is fabricated simultaneously with the linear integrated circuit using selected steps of the complementary bipolar technology. High voltage linear circuits and efficient logic circuits are achieved based on the use of a single moderate resistivity N-type epitaxial layer deposited on a high resistivity P-type substrate. In the logic circuit portion the epitaxial layer forms the collector zone of the current source transistor and the base zone of the switching transistor.