Patents by Inventor Aritra Banerjee
Aritra Banerjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11704452Abstract: In one embodiment, a system and method for determining a natural frequency of a structure involve modeling the structure, creating a synthesized excitation comprising a plurality of waves having various frequencies within a defined range of frequencies, applying the synthesized excitation to a base of the modeled structure, and generating response data indicative of a natural frequency of the modeled structure that is based upon the application of the synthesized excitation.Type: GrantFiled: December 4, 2018Date of Patent: July 18, 2023Assignee: Board of Regents, The University of Texas SystemInventors: Sayantan Chakraborty, Jasaswee T. Das, Aritra Banerjee, Anand J. Puppala
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Patent number: 11223329Abstract: A power amplifier circuitry (100) comprises: a transistor stack (110) comprising at least two stacked transistor units (112A, 112B, 112C) for amplifying input signals; wherein each stacked transistor unit (112A, 112B, 112C) comprises a plurality of controllable segments (120-1 to 120-N, 130-1 to 130-N, 140-1 to 140-N), each comprising a segment transistor (122, 132, 142), wherein source terminals (123, 133, 143) within each transistor unit are connected, drain terminals (125, 135, 145) within each transistor unit are connected and gate terminals (124, 134, 144) within each transistor unit are connected, wherein each segment transistor (122, 132, 142) further comprises a back gate terminal (126, 136, 146) for setting a body bias, wherein at least two of the segment transistors (122, 132, 142) within each transistor unit have independently connected back gate terminals (126, 136, 146); and a control unit (190) configured to control the body bias for selecting an amplifier class of each of the controllable segmeType: GrantFiled: February 12, 2020Date of Patent: January 11, 2022Assignees: IMEC USA NANOELECTRONICS DESIGN CENTER, Inc., IMEC VZWInventors: Aritra Banerjee, Pierre Wambacq
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Patent number: 11171616Abstract: A first branch group circuit includes a first branch circuit receiving a first RF input signal and first control information; and a second branch circuit receiving the first input signal and second control information. Each of the first and second branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit remains on. A second branch group circuit includes: a third branch circuit receiving a second RF input signal and third control information; and a fourth branch circuit receiving the second input signal and fourth control information. Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner combines output signals of the power amplifiers to produce an output signal.Type: GrantFiled: January 28, 2019Date of Patent: November 9, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Rahmi Hezar, Lei Ding, Nathan Richard Schemm
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Publication number: 20210249996Abstract: A power amplifier circuitry (100) comprises: a transistor stack (110) comprising at least two stacked transistor units (112A, 112B, 112C) for amplifying input signals; wherein each stacked transistor unit (112A, 112B, 112C) comprises a plurality of controllable segments (120-1 to 120-N, 130-1 to 130-N, 140-1 to 140-N), each comprising a segment transistor (122, 132, 142), wherein source terminals (123, 133, 143) within each transistor unit are connected, drain terminals (125, 135, 145) within each transistor unit are connected and gate terminals (124, 134, 144) within each transistor unit are connected, wherein each segment transistor (122, 132, 142) further comprises a back gate terminal (126, 136, 146) for setting a body bias, wherein at least two of the segment transistors (122, 132, 142) within each transistor unit have independently connected back gate terminals (126, 136, 146); and a control unit (190) configured to control the body bias for selecting an amplifier class of each of the controllable segmeType: ApplicationFiled: February 12, 2020Publication date: August 12, 2021Inventors: Aritra BANERJEE, Pierre WAMBACQ
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Patent number: 10666204Abstract: A circuit includes an amplifier to amplify an input signal and generate an output signal. The circuit also includes a tuning network to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, which includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure over a control structure, which is to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.Type: GrantFiled: October 29, 2018Date of Patent: May 26, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
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Publication number: 20190171790Abstract: In one embodiment, a system and method for determining a natural frequency of a structure involve modeling the structure, creating a synthesized excitation comprising a plurality of waves having various frequencies within a defined range of frequencies, applying the synthesized excitation to a base of the modeled structure, and generating response data indicative of a natural frequency of the modeled structure that is based upon the application of the synthesized excitation.Type: ApplicationFiled: December 4, 2018Publication date: June 6, 2019Inventors: Sayantan CHAKRABORTY, Jasaswee T. DAS, Aritra BANERJEE, Anand J. PUPPALA
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Publication number: 20190173438Abstract: A first branch group circuit includes a first branch circuit receiving a first RF input signal and first control information; and a second branch circuit receiving the first input signal and second control information. Each of the first and second branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit remains on. A second branch group circuit includes: a third branch circuit receiving a second RF input signal and third control information; and a fourth branch circuit receiving the second input signal and fourth control information. Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner combines output signals of the power amplifiers to produce an output signal.Type: ApplicationFiled: January 28, 2019Publication date: June 6, 2019Inventors: Aritra Banerjee, Rahmi Hezar, Lei Ding, Nathan Richard Schemm
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Patent number: 10250192Abstract: An outphasing amplifier includes a first class-E power amplifier having an output coupled to a first conductor and an input receiving a first RF drive signal. A first reactive element is coupled between the first conductor and a second conductor. A second reactive element is coupled between the second conductor and a third conductor. A second class-E power amplifier includes an output coupled to a fourth conductor and an input coupled to a second RF drive signal, a third reactive element coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load. An efficiency enhancement circuit is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits are coupled to the first and fourth conductors, respectively.Type: GrantFiled: September 19, 2017Date of Patent: April 2, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar, Lei Ding
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Publication number: 20190068135Abstract: A circuit includes an amplifier to amplify an input signal and generate an output signal. The circuit also includes a tuning network to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, which includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure over a control structure, which is to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.Type: ApplicationFiled: October 29, 2018Publication date: February 28, 2019Inventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
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Patent number: 10193508Abstract: A multi-level, multi-branch outphasing amplifier (20-1) includes a first branch group circuit (22-1) including a first branch circuit (11) receiving a first RF input signal (S1(t)) and first control information (S11_Ctrl=VDD) and a second branch circuit (12) receiving the first input signal and second control information (S12_Ctrl). Each of the first (11) and second (12) branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit (12) remains on. A second branch group circuit (22-2) includes a third branch circuit (21) receiving a second RF input signal (S2(t)) and third control information (S21_Ctrl=VDD) and a fourth branch circuit (22) receiving the second input signal (S2(t)) and fourth control information (S22_Ctrl). Each of the third and fourth branch circuits includes a power amplifier.Type: GrantFiled: April 17, 2014Date of Patent: January 29, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Rahmi Hezar, Lei Ding, Nathan Richard Schemm
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Patent number: 10116270Abstract: A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, where the at least one tunable capacitor includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure disposed over a control structure, where the control structure is configured to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.Type: GrantFiled: September 14, 2016Date of Patent: October 30, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
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Publication number: 20180006609Abstract: An outphasing amplifier includes a first class-E power amplifier having an output coupled to a first conductor and an input receiving a first RF drive signal. A first reactive element is coupled between the first conductor and a second conductor. A second reactive element is coupled between the second conductor and a third conductor. A second class-E power amplifier includes an output coupled to a fourth conductor and an input coupled to a second RF drive signal, a third reactive element coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load. An efficiency enhancement circuit is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits are coupled to the first and fourth conductors, respectively.Type: ApplicationFiled: September 19, 2017Publication date: January 4, 2018Inventors: Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar, Lei Ding
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Patent number: 9806673Abstract: An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.Type: GrantFiled: May 26, 2016Date of Patent: October 31, 2017Assignee: TEXAS INSTRUMENT INCORPORATEDInventors: Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar, Lei Ding
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Publication number: 20170005628Abstract: A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, where the at least one tunable capacitor includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure disposed over a control structure, where the control structure is configured to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.Type: ApplicationFiled: September 14, 2016Publication date: January 5, 2017Inventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
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Patent number: 9473078Abstract: A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, where the at least one tunable capacitor includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure disposed over a control structure, where the control structure is configured to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.Type: GrantFiled: August 5, 2014Date of Patent: October 18, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
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Publication number: 20160268974Abstract: An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.Type: ApplicationFiled: May 26, 2016Publication date: September 15, 2016Inventors: Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar, Lei Ding
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Patent number: 9385669Abstract: An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.Type: GrantFiled: June 23, 2014Date of Patent: July 5, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar, Lei Ding
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Publication number: 20160043698Abstract: A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, where the at least one tunable capacitor includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure disposed over a control structure, where the control structure is configured to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.Type: ApplicationFiled: August 5, 2014Publication date: February 11, 2016Inventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
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Publication number: 20150372645Abstract: An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.Type: ApplicationFiled: June 23, 2014Publication date: December 24, 2015Inventors: Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar, Lei Ding
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Publication number: 20150303961Abstract: A multi-level, multi-branch outphasing amplifier (20-1) includes a first branch group circuit (22-1) including a first branch circuit (11) receiving a first RF input signal (S1(t)) and first control information (S11—Ctrl=VDD) and a second branch circuit (12) receiving the first input signal and second control information (S12—Ctrl). Each of the first (11) and second (12) branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit (12) remains on. A second branch group circuit (22-2) includes a third branch circuit (21) receiving a second RF input signal (S2(t)) and third control information (S21—Ctrl=VDD) and a fourth branch circuit (22) receiving the second input signal (S2(t)) and fourth control information (S22—Ctrl). Each of the third and fourth branch circuits includes a power amplifier.Type: ApplicationFiled: April 17, 2014Publication date: October 22, 2015Applicant: Texas Instruments IncorporatedInventors: Aritra Banerjee, Rahmi Hezar, Lei Ding, Nathan Richard Schemm