Patents by Inventor Arjun Dutt

Arjun Dutt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150178851
    Abstract: Managing insurance product model relationships is disclosed. A dependency data store storing dependency relationships of a plurality of source insurance product model patterns and a corresponding plurality of target insurance product model patterns is maintained. It is detected that a user interface display associated with a source insurance product model pattern is to be updated. The dependency data store is checked to identify a dependency relationship of the source insurance product model pattern and a corresponding target insurance product model pattern. A user interface display associated with the target insurance product model pattern is updated.
    Type: Application
    Filed: August 18, 2014
    Publication date: June 25, 2015
    Inventors: Arjun Dutt, Robert Theodore Anagnoson
  • Patent number: 7519933
    Abstract: A method for inserting repeaters in an integrated circuit includes establishing a set of initial constraints for a given set of buses; assigning at least one repeater corresponding to each of the given set of buses based on the set of initial constraints; progressively relaxing the set of initial constraints to form a new set of constraints for a new set of buses and assigning at least one repeater corresponding to each of the new set of buses based on the new set of constraints; and routing assigned repeaters to each of the new set of buses in the integrated circuit.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: April 14, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Arjun Dutt, Dajen Huang, Yi Wu
  • Patent number: 7487488
    Abstract: A mechanism is disclosed for assigning repeaters to signal paths in an integrated circuit design. The mechanism involves reserving, in a first metal layer of the integrated circuit design, metal tracks for routing signals. Access points to a plurality of repeaters are reserved in a second metal layer of the integrated circuit design. Each access point is associated with a particular repeater. The design may have other layers between the second metal layer and a region reserved for the repeaters. The number of repeaters may be based on the number of metal tracks that are available to route signals through the first region. Signal paths are assigned routes that comprise at least a portion of one or more of the metal tracks. A route from signal paths requiring a repeater to access points to a particular repeater is determined. Thus, the signal paths are assigned to a repeater.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: February 3, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Dajen Huang, Yi Wu, Arjun Dutt, Yu L. Zheng
  • Patent number: 7404161
    Abstract: A method for maintaining equivalency between the reference Register Transfer Logic (RTL) and the physical layout design of an integrated circuit by way of maintaining a reference netlist derived from symbolic connectivity.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: July 22, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Arjun Dutt, Stephan Hoerold
  • Publication number: 20080077899
    Abstract: A method for inserting repeaters in an integrated circuit includes establishing a set of initial constraints for a given set of buses; assigning at least one repeater corresponding to each of the given set of buses based on the set of initial constraints; progressively relaxing the set of initial constraints to form a new set of constraints for a new set of buses and assigning at least one repeater corresponding to each of the new set of buses based on the new set of constraints; and routing assigned repeaters to each of the new set of buses in the integrated circuit.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 27, 2008
    Applicant: Sun Microsystems, Inc.
    Inventors: Arjun Dutt, Dajen Huang, Yi Wu
  • Patent number: 7340710
    Abstract: A method for binning and layout of an integrated circuit design which includes providing a table setting forth predefined widths of signal wires and corresponding spacing to shield wires, characterizing effects on timing, noise, and power distribution based on predefined widths and spacing combinations as functions of the length of the signal wire, and laying out the integrated circuit design based upon the predefined widths of signal wires and corresponding spacing to shield wires. The shield wires are adjacent and on both sides of the routed signal wire.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: March 4, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Stephan Hoerold, Arjun Dutt
  • Publication number: 20060282810
    Abstract: A method for maintaining equivalency between the reference Register Transfer Logic (RTL) and the physical layout design of an integrated circuit by way of maintaining a reference netlist derived from symbolic connectivity.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 14, 2006
    Inventors: Arjun Dutt, Stephan Hoerold