Patents by Inventor Arjun Kar Roy

Arjun Kar Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6943414
    Abstract: According to one exemplary embodiment, an integrated circuit chip comprises a first interconnect metal layer. The integrated circuit chip further comprises a first intermediate dielectric layer situated over the first interconnect metal layer. The integrated circuit chip further comprises a metal resistor situated over the first intermetallic dielectric layer and below a second intermetallic dielectric layer. The integrated circuit chip further comprises a second interconnect metal layer over the second intermetallic dielectric layer. The integrated circuit chip further comprises a first intermediate via connected to first terminal of the metal resistor, where the first intermediate via is further connected to a first metal segment patterned in the second interconnect metal layer.
    Type: Grant
    Filed: February 9, 2002
    Date of Patent: September 13, 2005
    Assignee: Newport Fab, LLC
    Inventors: Arjun Kar Roy, David Howard, Q.Z. Liu
  • Publication number: 20020132442
    Abstract: According to one exemplary embodiment, an integrated circuit chip comprises a first interconnect metal layer. The integrated circuit chip further comprises a first intermediate dielectric layer situated over the first interconnect metal layer. The integrated circuit chip further comprises a metal resistor situated over the first intermetallic dielectric layer and below a second intermetallic dielectric layer. The integrated circuit chip further comprises a second interconnect metal layer over the second intermetallic dielectric layer. The integrated circuit chip further comprises a first intermediate via connected to first terminal of the metal resistor, where the first intermediate via is further connected to a first metal segment patterned in the second interconnect metal layer.
    Type: Application
    Filed: February 9, 2002
    Publication date: September 19, 2002
    Applicant: CONEXANT SYSTEMS, INC.
    Inventors: Arjun Kar Roy, David Howard, Q.Z. Liu
  • Patent number: 6387770
    Abstract: An improved thin-film capacitor and methods for forming the same on a surface of a substrate are disclosed. The capacitor includes a bottom conducting plate formed by depositing conductive material within a trench of an insulating layer and planarizing the conducting and insulating layers. A dielectric film is then deposited on the substrate surface, such that at least a portion of the dielectric material remains over the bottom conducting plate. A second conductive layer is then deposited over the surface of the substrate, patterned and etched such that at least a portion of the second conducting material resides over at least a portion of the dielectric material.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: May 14, 2002
    Assignee: Conexant Systems, Inc.
    Inventor: Arjun Kar Roy
  • Publication number: 20010019144
    Abstract: An improved thin-film capacitor and methods for forming the same on a surface of a substrate are disclosed. The capacitor includes a bottom conducting plate formed by depositing conductive material within a trench of an insulating layer and planarizing the conducting and insulating layers. A dielectric film is then deposited on the substrate surface, such that at least a portion of the dielectric material remains over the bottom conducting plate. A second conductive layer is then deposited over the surface of the substrate, patterned and etched such that at least a portion of the second conducting material resides over at least a portion of the dielectric material.
    Type: Application
    Filed: January 30, 2001
    Publication date: September 6, 2001
    Inventor: Arjun Kar Roy
  • Patent number: 6180976
    Abstract: An improved thin-film capacitor and methods for forming the same on a surface of a substrate are disclosed. The capacitor includes a bottom conducting plate formed by depositing conductive material within a trench of an insulating layer and planarizing the conducting and insulating layers. A dielectric film is then deposited on the substrate surface, such that at least a portion of the dielectric material remains over the bottom conducting plate. A second conductive layer is then deposited over the surface of the substrate, patterned and etched such that at least a portion of the second conducting material resides over at least a portion of the dielectric material.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: January 30, 2001
    Assignee: Conexant Systems, Inc.
    Inventor: Arjun Kar Roy