Patents by Inventor Arjun Krishnan

Arjun Krishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190393112
    Abstract: Embodiments include an encapsulation material, one or more semiconductor packages, and methods of the semiconductor packages. A semiconductor package including dies disposed on a package substrate. The semiconductor package also includes at least one of an underfill layer, a mold layer, and a dielectric layer on or in the package substrate. The semiconductor package further includes an encapsulation material having a fluorescent chemical compound and an epoxy. The encapsulation material may be incorporated into at least one of the underfill layer, the mold layer, and/or the dielectric layer on or in the package substrate. The fluorescent chemical compound of the encapsulation material may include at least one of a poly(vinylcarbazole) (PVCz), a 1,4-Bis(5-phenyl-2-oxazolyl) benzene (POPOP), and/or a plurality of conjugated, aromatic molecules and polymers. The encapsulation material may include at least one of a hardener, a filler, an additive, and/or a polymer.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 26, 2019
    Inventors: Elizabeth NOFEN, Bharat PENMECHA, Arjun KRISHNAN, Malavarayan SANKARASUBRAMANIAN
  • Patent number: 10115606
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include modifying an underfill material with one of a thiol adhesion promoter, an azole coupling agent, surface modified filler, and peroxide based cross-linking polymer chemistries to greatly enhance adhesion in package structures utilizing the embodiments herein.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: October 30, 2018
    Assignee: Intel Corporation
    Inventors: Yiqun Bai, Yuying Wei, Arjun Krishnan, Suriyakala Ramalingam, Yonghao Xiu, Beverly J. Canham, Sivakumar Nagarajan, Saikumar Jayaraman, Nisha Ananthakrishnan
  • Publication number: 20180286704
    Abstract: A process for applying an underfill material to a die is disclosed. A wafer is diced into a plurality of dies (without having any underfill film thereon) such that the dies have exposed bumps prior to an underfill process. Thus, the dies can be tested about their bump-sides because the bumps are entirely exposed for testing. The dies are then reconstituted bump-side up on a carrier panel in an array such that the dies are separated from each other by a gap. Underfill material (e.g., epoxy flux film) is then vacuum laminated to the carrier panel and the plurality of dies to encapsulate the dies. The underfill material is then cut between adjacent dies such that a portion of the underfill material covers at least one side edge of each die. The encapsulated dies are then removed from the carrier panel, thereby being prepared for a thermal bonding process to a substrate. Associated devices are provided.
    Type: Application
    Filed: April 1, 2017
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Elizabeth M. Nofen, Arjun Krishnan, James C. Matayabas, JR., Venmathy McMahan, Nisha Ananthakrishnan, Yonghao Xiu
  • Patent number: 9793151
    Abstract: Some example forms relate to a stiffener tape for a wafer. The stiffener tape includes a mounting tape and a stiffener removably attached to the mounting tape. The stiffener tape further includes a die attach film attached to the stiffener. Other example forms relate to an electronic assembly that includes a wafer and a stiffener tape attached to the wafer. The stiffener tape includes a die attach film mounted to the wafer. A stiffener is attached to the die attach film and a mounting tape is removably attached to the stiffener. Still other example forms relate to a method that includes forming a stiffener tape which includes a mounting tape, a stiffener removably attached to the mounting tape and a die attach film attached to the stiffener.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: October 17, 2017
    Assignee: Intel Corporation
    Inventors: Xavier Brun, Arjun Krishnan, Mohit Mamodia, Dingying Xu
  • Patent number: 9704767
    Abstract: Techniques and mechanisms for mitigating warpage of structures in a package. In an embodiment, a packaged integrated circuit device includes a mold compound disposed at least partially around an integrated circuit chip. The mold compound comprises fibers suspended in a media that is to aid in mechanical reinforcement of such fibers. The reinforced fibers contribute to mold compound properties that resist warping of the IC chip that might otherwise take place as a result of solder reflow or other processing. A modulus of elasticity of the mold compound is equal to or more than three GigePascals (3 GPa), where the modulus of elasticity corresponds to a temperature equal to two hundred and sixty degrees Celsius (260° C.). In another embodiment, a spiral flow value of the mold compound is equal to or more than sixty five centimeters (65 cm).
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: July 11, 2017
    Assignee: Intel Corporation
    Inventors: Suriyakala Ramalingam, Yiqun Bai, Nisha Ananthakrishnan, Arjun Krishnan
  • Publication number: 20170186658
    Abstract: Techniques and mechanisms for mitigating warpage of structures in a package. In an embodiment, a packaged integrated circuit device includes a mold compound disposed at least partially around an integrated circuit chip. The mold compound comprises fibers suspended in a media that is to aid in mechanical reinforcement of such fibers. The reinforced fibers contribute to mold compound properties that resist warping of the IC chip that might otherwise take place as a result of solder reflow or other processing. A modulus of elasticity of the mold compound is equal to or more than three GigePascals (3 GPa), where the modulus of elasticity corresponds to a temperature equal to two hundred and sixty degrees Celsius (260° C.). In another embodiment, a spiral flow value of the mold compound is equal to or more than sixty five centimeters (65 cm).
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Inventors: Suriyakala RAMALINGAM, Yiqun BAI, Nisha ANANTHAKRISHNAN, Arjun KRISHNAN
  • Patent number: 9640415
    Abstract: Methods for covalently and indelibly anchoring a polyacrylate polymer using a UV-induced polymerization process in the presence of a photoinitiator to an oxide surface are disclosed herein. The methods and compositions prepared by the methods can be used as indelible marking materials for use on microelectronic packages and as solder and sealant barriers to prevent overspreading of liquids on the oxide surfaces of microelectronic packages. The polyacrylate polymers are covalently linked to the oxide surface by use during the printing and UV-curing process of an adhesion promoter having as a first domain an oxide-reactive silyl group, bonded via a linker to an acrylate-reactive group.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: May 2, 2017
    Assignee: Intel Corporation
    Inventors: Randall D Lowe, Jr., Suriyakala Suriya Ramalingam, Nisha Ananthakrishnan, James C. Matayabas, Jr., Arjun Krishnan, Hitesh Arora
  • Patent number: 9631065
    Abstract: Methods of forming microelectronic packaging structures and associated structures formed thereby are described. Those methods and structures may include forming a wafer level underfill (WLUF) material comprising a resin material, and adding at least one of a UV absorber, a sterically hindered amine light stabilizer (HALS), an organic surface protectant (OSP), and a fluxing agent to form the WLUF material. The WLUF is then applied to a top surface of a wafer comprising a plurality of die.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventors: Anna M. Prakash, James C. Matayabas, Arjun Krishnan, Nisha Ananthakrishnan
  • Patent number: 9620404
    Abstract: A stiffener tape for a wafer. The stiffener tape includes a mounting tape; a heat spreading stiffener removably attached to the mounting tape; and an attachment film secured to the heat spreading stiffener, wherein the attachment film includes thermal conductive fillers having at least one of silver, alumina, crystalline silica, boron nitride or aluminum nitride. An electronic assembly includes a wafer; a plurality of integrated circuits on the wafer; and an attachment film covering the plurality of integrated circuits and the substrate, wherein the attachment film includes thermal conductive fillers having at least one of silver, alumina, crystalline silica, boron nitride or aluminum nitride; and a heat spreading stiffener secured to the attachment film.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: April 11, 2017
    Assignee: Intel Corporation
    Inventors: Xavier F. Brun, Arjun Krishnan
  • Patent number: 9611372
    Abstract: An underfill composition comprises a curable resin, a plurality of filler particles loaded within the resin, the filler particles comprising at least 50 weight % of the underfill composition. The filler particles comprise first filler particles having a particle size of from 0.1 micrometers to 15 micrometers and second filler particles having a particle size of less than 100 nanometers. A viscosity of the underfill composition is less than a viscosity of a corresponding composition not including the second filler particles.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: April 4, 2017
    Assignee: Intel Corporation
    Inventors: Yonghao Xiu, Nisha Ananthakrishnan, Yiqun Bai, Arjun Krishnan
  • Publication number: 20160240395
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include modifying an underfill material with one of a thiol adhesion promoter, an azole coupling agent, surface modified filler, and peroxide based cross-linking polymer chemistries to greatly enhance adhesion in package structures utilizing the embodiments herein.
    Type: Application
    Filed: April 26, 2016
    Publication date: August 18, 2016
    Inventors: Yiqun Bai, Yuying Wei, Arjun Krishnan, Suriyakala Ramalingam, Yonghao Xiu, Beverly J. Canham, Sivakumar Nagarajan, Saikumar Jayaraman, Nisha Ananthakrishnan
  • Publication number: 20160168351
    Abstract: An underfill composition comprises a curable resin, a plurality of filler particles loaded within the resin, the filler particles comprising at least 50 weight % of the underfill composition. The filler particles comprise first filler particles having a particle size of from 0.1 micrometers to 15 micrometers and second filler particles having a particle size of less than 100 nanometers. A viscosity of the underfill composition is less than a viscosity of a corresponding composition not including the second filler particles.
    Type: Application
    Filed: February 19, 2016
    Publication date: June 16, 2016
    Inventors: Yonghao Xiu, Nisha Ananthakrishnan, Yiqun Bai, Arjun Krishnan
  • Publication number: 20160172229
    Abstract: Some example forms relate to a stiffener tape for a wafer. The stiffener tape includes a mounting tape and a stiffener removably attached to the mounting tape. The stiffener tape further includes a die attach film attached to the stiffener. Other example forms relate to an electronic assembly that includes a wafer and a stiffener tape attached to the wafer. The stiffener tape includes a die attach film mounted to the wafer. A stiffener is attached to the die attach film and a mounting tape is removably attached to the stiffener. Still other example forms relate to a method that includes forming a stiffener tape which includes a mounting tape, a stiffener removably attached to the mounting tape and a die attach film attached to the stiffener.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 16, 2016
    Inventors: Xavier Brun, Arjun Krishnan, Mohit Mamodia, Dingying Xu
  • Patent number: 9330993
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include modifying an underfill material with one of a thiol adhesion promoter, an azole coupling agent, surface modified filler, and peroxide based cross-linking polymer chemistries to greatly enhance adhesion in package structures utilizing the embodiments herein.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: May 3, 2016
    Assignee: Intel Corporation
    Inventors: Yiqun Bai, Yuying Wei, Arjun Krishnan, Suriyakala Ramalingam, Yonghao Xiu, Beverly J. Canham, Sivakumar Nagarajan, Saikumar Jayaraman, Nisha Ananthakrishnan
  • Patent number: 9269596
    Abstract: An underfill composition comprises a curable resin, a plurality of filler particles loaded within the resin, the filler particles comprising at least 50 weight % of the underfill composition. The filler particles comprise first filler particles having a particle size of from 0.1 micrometers to 15 micrometers and second filler particles having a particle size of less than 100 nanometers. A viscosity of the underfill composition is less than a viscosity of a corresponding composition not including the second filler particles.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: February 23, 2016
    Assignee: Intel Corporation
    Inventors: Yonghao Xiu, Nisha Ananthakrishnan, Yiqun Bai, Arjun Krishnan
  • Patent number: 9230833
    Abstract: Embodiments of the present description include methods for attaching a microelectronic device to a microelectronic substrate with interconnection structures after disposing of an underfill material on the microelectronic device, wherein filler particless within the underfill material may be repelled away from the interconnection structures prior to connecting the microelectronic device to the microelectronic structure. These methods may include inducing a charge on the interconnection structures and may include placing the interconnection structures between opposing plates and producing a bias between the opposing plates after depositing the underfill material on the interconnection structures.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: January 5, 2016
    Assignee: Intel Corporation
    Inventors: Manish Dubey, Rajendra C. Dias, Yonghao Xiu, Arjun Krishnan, Yiqun Bai, Purushotham Kaushik Muthur Srinath
  • Publication number: 20150179479
    Abstract: Embodiments of the present description include methods for attaching a microelectronic device to a microelectronic substrate with interconnection structures after disposing of an underfill material on the microelectronic device, wherein filler particless within the underfill material may be repelled away from the interconnection structures prior to connecting the microelectronic device to the microelectronic structure. These methods may include inducing a charge on the interconnection structures and may include placing the interconnection structures between opposing plates and producing a bias between the opposing plates after depositing the underfill material on the interconnection structures.
    Type: Application
    Filed: March 4, 2015
    Publication date: June 25, 2015
    Applicant: INTEL CORPORATION
    Inventors: Manish Dubey, Rajendra C. Dias, Yonghao Xiu, Arjun Krishnan, Yiqun Bai, Purushothan Kaushik Muthur Srinath
  • Publication number: 20150179478
    Abstract: An underfill composition comprises a curable resin, a plurality of filler particles loaded within the resin, the filler particles comprising at least 50 weight % of the underfill composition. The filler particles comprise first filler particles having a particle size of from 0.1 micrometers to 15 micrometers and second filler particles having a particle size of less than 100 nanometers. A viscosity of the underfill composition is less than a viscosity of a corresponding composition not including the second filler particles.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Inventors: Yonghao Xiu, Nisha Ananthakrishnan, Yiqun Bai, Arjun Krishnan
  • Publication number: 20150166804
    Abstract: Methods for covalently and indelibly anchoring a polyacrylate polymer using a UV-induced polymerization process in the presence of a photoinitiator to an oxide surface are disclosed herein. The methods and compositions prepared by the methods can be used as indelible marking materials for use on microelectronic packages and as solder and sealant barriers to prevent overspreading of liquids on the oxide surfaces of microelectronic packages. The polyacrylate polymers are covalently linked to the oxide surface by use during the printing and UV-curing process of an adhesion promoter having as a first domain an oxide-reactive silyl group, bonded via a linker to an acrylate-reactive group.
    Type: Application
    Filed: December 1, 2014
    Publication date: June 18, 2015
    Inventors: Randall D. Lowe, JR., Suriyakala Suriya Ramalingam, Nisha Ananthakrishnan, James C. Matayabas, JR., Arjun Krishnan, Hitesh Arora
  • Patent number: 8999765
    Abstract: Embodiments of the present description include methods for attaching a microelectronic device to a microelectronic substrate with interconnection structures after disposing of an underfill material on the microelectronic device, wherein filler particles within the underfill material may be repelled away from the interconnection structures prior to connecting the microelectronic device to the microelectronic structure. These methods may include inducing a charge on the interconnection structures and may include placing the interconnection structures between opposing plates and producing a bias between the opposing plates after depositing the underfill material on the interconnection structures.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: April 7, 2015
    Assignee: Intel Corporation
    Inventors: Manish Dubey, Rajendra C. Dias, Yonghao Xiu, Arjun Krishnan, Yiqun Bai, Purushotham Kaushik Muthur Srinath