Abstract: A semiconductor device is disclosed including a semiconductor die mounted on a substrate. The substrate includes a pattern of solder balls which is complementary and aligned to a pattern of solder bumps on the semiconductor die. These complementary and aligned patterns of solder balls and solder bumps minimize the lengths of current paths between the solder balls and solder bumps, and provide current paths between the solder balls and solder bumps of relatively uniform lengths.

Abstract: A method for duty cycle error detection and correction includes receiving, during a read operation performed on a memory cell, a first data strobe signal. The method also includes generating a second data strobe signal by phase delaying the first data strobe signal. The method also includes determining, based on the first data strobe signal and the second data strobe signal, whether a duty cycle corresponding to the first data strobe signal is distorted. The method also includes adjusting a clock signal based on a determination that the duty cycle is distorted.

Abstract: A method for duty cycle error detection and correction includes receiving, during a read operation performed on a memory cell, a first data strobe signal. The method also includes generating a second data strobe signal by phase delaying the first data strobe signal. The method also includes determining, based on the first data strobe signal and the second data strobe signal, whether a duty cycle corresponding to the first data strobe signal is distorted. The method also includes adjusting a clock signal based on a determination that the duty cycle is distorted.

Abstract: A semiconductor device is disclosed including a semiconductor die mounted on a substrate. The substrate includes a pattern of solder balls which is complementary and aligned to a pattern of solder bumps on the semiconductor die. These complementary and aligned patterns of solder balls and solder bumps minimize the lengths of current paths between the solder balls and solder bumps, and provide current paths between the solder balls and solder bumps of relatively uniform lengths.

Abstract: An apparatus includes a first transceiver of a wearable device. The first transceiver is configured to communicate using a first communication network having a first communication range. The apparatus further includes a second transceiver of the wearable device. The second transceiver is configured to communicate using a second communication network having a second communication range that is less than the first communication range. The apparatus also includes a receptacle of the wearable device. The receptacle is configured to receive an audio device that is configured to communicate with the second transceiver using the second communication network.

Abstract: An apparatus includes a first transceiver of a wearable device. The first transceiver is configured to communicate using a first communication network having a first communication range. The apparatus further includes a second transceiver of the wearable device. The second transceiver is configured to communicate using a second communication network having a second communication range that is less than the first communication range. The apparatus also includes a receptacle of the wearable device. The receptacle is configured to receive an audio device that is configured to communicate with the second transceiver using the second communication network.

Abstract: A system for optimizing drive strength may be utilized for identifying the maximum data transfer rate for different devices and different device configurations. The drive strength may be optimized for input/output (I/O) devices by measuring voltage drops on I/O power supply using different test patterns. The maximum drive strength is identified that satisfies a limit or threshold for the allowed voltage drop level. The test pattern may include a simultaneous toggling of each I/O device. A slew rate for the device may be utilized along with the drive strength for identifying the maximum data transfer rate.

Abstract: An inductively enabled power pack charging system and method includes an integrated circuit for controlling inductive transfer of power to the power pack and managing communication with an external power source. The system may further include an electrochemical cell for storing energy received from the external power supply and magnetic shielding material for guiding magnetic flux away from the electrochemical cell.

Abstract: A system for optimizing drive strength may be utilized for identifying the maximum data transfer rate for different devices and different device configurations. The drive strength may be optimized for input/output (I/O) devices by measuring voltage drops on I/O power supply using different test patterns. The maximum drive strength is identified that satisfies a limit or threshold for the allowed voltage drop level. The test pattern may include a simultaneous toggling of each I/O device. A slew rate for the device may be utilized along with the drive strength for identifying the maximum data transfer rate.

Abstract: An inductively enabled power pack charging system and method includes an integrated circuit for controlling inductive transfer of power to the power pack and managing communication with an external power source. The system may further include an electrochemical cell for storing energy received from the external power supply and magnetic shielding material for guiding magnetic flux away from the electrochemical cell.