Abstract: A kick back compensated charge pump circuit with kicker capacitor is disclosed. The charge pump circuit comprises a pump up circuit that comprises a first PMOS transistor and a second PMOS transistor in a cascode configuration and coupled to a first kicker capacitor. The charge pump circuit also comprises a pump down circuit that comprises a first NMOS transistor and a second NMOS transistor in a cascode configuration and coupled to a second kicker capacitor. The kicker capacitors increase the speed of the charge pump circuit by charging and discharging a gate to source capacitance (CGS) of the pump up circuit and of the pump down circuit of the charge pump circuit.

Abstract: An apparatus, device, and method for loss of signal detection in a receiver are provided. A reference circuit is operable to rectify a reference signal. An input circuit is operable to rectify an input signal. A comparator is operable to compare outputs of the reference circuit and the input circuit and to generate an output signal based on the comparison. The output signal indicates whether the input signal falls within threshold limits defined by the reference signal. A second reference circuit and a second input circuit could also be used, and the reference circuits and input circuits can be selectively enabled and disabled based on which of multiple differential pairs is enabled in a receiver receiving the input signal. The differential pairs can be used in the receiver to generate an output signal based on the input signal.

Abstract: An apparatus, device, and method for high-speed serial communications are provided. An input circuit is operable to receive an input signal, where the input circuit includes transistors forming (i) a first differential pair associated with a first current source and (ii) a second differential pair associated with a second current source. An output circuit is coupled to the input circuit and is operable to generate an output signal based on the input signal. A sensing circuit is operable to estimate a voltage associated with one of the current sources. A comparator is operable to compare the estimated voltage and a reference voltage and to selectively enable one of the differential pairs and disable another of the differential pairs based on the comparison. The differential pairs could be enabled and disabled using a first switch associated with the first differential pair and a second switch associated with the second differential pair.

Abstract: A double-sampled pipeline analog-to-digital conversion (ADC) system and method in which latching of the intrastage digital quantization signals occurs approximately midway the leading and trailing edges of the clock signals.

Abstract: A current conveyor circuit with improved power supply noise immunity. Additional biasing circuitry causes the nominal biasing potential applied to the output circuit to be increased, thereby producing a corresponding increase in the magnitude of noise voltage needed to appear on the power supply before the output signal becomes affected.

Abstract: A low voltage folded metal oxide semiconductor field effect transistor (MOSFET) amplifier circuit for use in a ring oscillator. Operation at a reduced minimum power supply voltage is achieved via a circuit topology with selectively coordinated transistor biasing and channel dimensions.

Abstract: A low voltage semi-folded metal oxide semiconductor field effect transistor (MOSFET) amplifier circuit for use in a ring oscillator. Operation at a reduced minimum power supply voltage is achieved via a circuit topology with selectively coordinated transistor biasing and channel dimensions.

Abstract: A pipelined analog-to-digital converter (ADC) in which one less pipeline stage is needed while the output ADC stage has its resolution increased by one bit, thereby advantageously providing for decreased circuit area, lower power consumption and endpoint correction, with minimal additional circuitry.

Abstract: A multistage differential amplifier with commonly controlled input and output common mode voltages. A shared common mode control signal jointly controls both input and output common mode voltages with a DC gain and bandwidth substantially equivalent to the differential signal gain and bandwidth.

Abstract: Differential echo cancellation receiver circuitry with dynamic cancellation of excess DC output current. Differential input circuitry provides for cancellation of incoming DC voltage and the incoming transmit signal echo while passing the receive signal. Excess DC current appearing in the input circuitry as part of the incoming DC voltage and echo signal cancellation is shunted away from the output circuitry with dynamically biased current shunting circuitry that tracks changes in the DC current within the input circuitry.

Abstract: A current source circuit with differential gain boosting is provided. The current source circuit differentially provides first and second currents. The first current is produced by a first cascoded current source, and the second current is produced by a second cascoded current source. Each of the cascoded current sources comprises a current source transistor and a cascode transistor. The current source circuit has high output impedance because a voltage associated with a gate of the cascode transistor of the first cascoded current source and another voltage associated with a gate of a cascode transistor of the second cascoded current source are each forced to an approximately constant voltage by a differential amplifier. The drain voltage of the first and second current source transistors are each servoed to the saturation drain to source voltage of the first current source transistor.

Abstract: A metal oxide semiconductor field effect transistor (MOSFET) cascode current mirror circuit architecture capable of operating at a low power supply voltage and with only one input reference number while maintaining a high dynamic signal range.

Abstract: An integrated circuit (IC) with metal oxide semiconductor field effect transistor (MOSFET) circular for generating a reference signal having a value which remains substantially constant over variations in one or more of the processing (P) of, power supply voltage (V) for and operating temperature (T) of the IC, with such reference signal being suitable for use in generating one or more biasing signals for one or more MOSFETs such that each MOSFET so biased will have a substantially constant ratio of transconductance and drain current.

Abstract: A metal oxide semiconductor field effect transistor (MOSFET) current mirror circuit with a cascode output in which maximum operating ranges are achieved for the power supply voltage and cascode output biasing voltage. Replica biasing ensures adequate biasing for the cascode driver transistors and accurate current mirroring.

Abstract: A low power differential amplifier powered by a plurality of unequal power supply voltages. The input stage operates at a higher power supply voltage so as to maintain its transistors in operational states of saturation while providing a sufficient dynamic signal voltage range. The output stage operates at a lower power supply voltage while providing a sufficient dynamic signal current range.

Abstract: A current source circuit with common-mode differential gain boosting is provided. The current source circuit differentially provides first and second currents. The first current is produced by a first cascoded current source, and the second current is produced by a second cascoded current source. Each of the cascoded current sources comprises a current source transistor and a cascode transistor. The current source circuit has high output impedance utilizing gain-boosting techniques. A three-input differential amplifier forces a gate of the cascode transistor of each of the current source circuits to an approximately constant voltage. The three-input differential amplifier is configured to receive a bias signal. The current source circuit is arranged to servo both the gate and source of the cascode transistors in response to the bias signal.

Abstract: Circuitry including Miller-effect feedback for use as part of a closed loop system such as a low dropout voltage regulator that provides current to a load at a specified voltage close in value to the power supply voltage. Various aspects of the presently claimed invention include using, within the Miller-effect feedback loop: a buffer amplifier to reduce loading effects upon an internal high impedance circuit node, output compensation circuitry to introduce a transfer function pole for substantially canceling a transfer function zero associated with external load circuitry; and Miller-effect compensation circuitry to introduce a transfer function zero for substantially canceling a transfer function pole associated with the Miller-effect feedback.

Abstract: An integrated charge pump circuit providing a regulated output voltage controlled by a voltage regulator with reduced power requirements in which the charge pump output voltage is a substantially constant multiple of the charge pump input voltage as defined by a voltage ratio which, in turn, is defined as a selected combination of a ratio of conductances of circuit elements within a feedback loop and ratios of other voltages including selected reference voltages and the charge pump input voltage.

Abstract: A startup circuit for a bandgap voltage reference generator circuit. Monitoring an internal reference voltage of the bandgap voltage reference generator circuit, current flow for the bandgap circuit diodes is initiated following circuit startup, e.g., initial application or DC power. In one embodiment, the monitored bandgap circuit reference voltage is replicated and used to assert and then de-assert a control signal used for initiating the diode current flow.

Abstract: A metal oxide semiconductor field effect transistor (MOSFET) amplifier with dynamically biased cascode output circuitry in which the biasing of the cascode output circuitry dynamically tracks one or more other internal amplifier bias voltages such that operation of each transistor in the input signal circuitry is maintained in a state of saturation.