Abstract: The remote control system having symmetrical signaling circuits for radio communications is coupled to a single wire line/audio channel and permits two or more units, base stations and/or remote consoles, to be coupled to the single wire line. Each signaling circuit comprises a wire line coupler for coupling to the wire line, an audio input line and an audio output line. An automatic gain control circuit is coupled between the wire coupler and the audio output line and a filter and line driver are coupled between the audio input line and the wire coupler. A control unit including a microprocessor, a tone encoder, a tone decoder, a timer, a clock, and a memory is coupled by output lines to the automatic gain control circuit for controlling the modes of operation thereof which include a slow decay mode, a fast decay mode, an adapt mode and a hold gain mode. The output from the gain control circuit is also routed through a band pass filter and a limiter to the control unit.

Abstract: A decoder for receiving and decoding a coded signal includes a particular frequency f.sub.o with a first and second amplitude. The first amplitude of the frequency f.sub.o is associated with the end of a first coded message while the second amplitude of the frequency f.sub.o is associated with the beginning of a second coded message. The decoder includes a receiver for receiving the coded signal, a tone detector circuit for detecting the frequency f.sub.o, a level sensor responsive to the receiver output, a function block for performing a command and a control unit responsive to the tone detector circuit and the sensor means. The tone detector and control unit operate in one of at least two possible states. In the first state the control unit causes the tone detector to respond to the first amplitude of the frequency f.sub.o. When the level sensor senses the second amplitude of the frequency f.sub.o the control unit responds by placing the tone detector circuit into its second state.

Abstract: The invention is a decoder for decoding serially received signals. The decoder includes circuitry for calculating the period of each signal in a group of the serially received signals. The decoder averages the periods of the group and calculates the groups average variance. Additional circuitry in the decoder calculates an average variance threshold. Detection circuitry within the decoder takes the average period, the average variance and the average variance threshold of the group of signals and produces a detection signal when the average period remains constant and the average variance remains below the average variance threshold for a predetermined minimum time period.

Abstract: The invention is a limiter circuit with dynamic hysteresis for providing improved distortion immunity at the circuit output in response to an input signal. The limiter circuit includes a positive and negative peak detector. Two weighted averages are taken of the positive and negative peaks, preferably by means of a voltage divider network. The first input to a comparator circuit receives the input signal to the limiter circuit. Different voltages from the voltage divider network are applied to the second input of the comparator circuit so as to create a dynamic hysteresis effect in the comparator circuit. The different voltages are chosen in response to the output voltage from the comparator circuit by means of an analog switch. The comparator circuit includes a fixed hysteresis voltage for stabilizing the limiter circuit at low level voltage input signals.

Abstract: A switching mode power supply provides a D.C. output voltage having a value related to the duty cycle of the supply's controlled oscillator produced signal. The inventive shutdown circuit inhibits operation of the supply if the duty cycle increases to a value indicative of failure of the supply to produce a minimum desired output voltage. Operation of the supply is inhibited for a predetermined shutdown interval following which a restart cycle deactivates the shutdown circuit for a period to allow the supply to attempt to establish its desired output.

Abstract: A mobile data terminal system is capable of voice or microprocessor controlled data transmission over a keyed transmitter. The improved timer apparatus disables further transmission if the transmission duration or the average duty cycle over a predetermined time period of repeated transmitter keying exceed predetermined limits. Where the disable mode resulted from a microprocessor fault, the transmitter continues to be disabled until the microprocessor is reset.

Abstract: Digitally encoded data is carried over a first channel between a base station and a plurality of mobiles with the mobiles sharing a second channel for transmission to the base on a contention basis. Proper decoding of the data requires clock syncing at the receiver site.To hasten clock recovery lock time at the base station and improve system throughput, each mobile includes apparatus for monitoring transmissions by the base station and deriving a transmit clock base for the mobile's transmitter therefrom such that subsequent transmissions by the mobiles are all substantially in synchronization.

Abstract: The presence of a tone in a received signal is detected by passing the signal through a bandpass filter tuned to the frequency of interest. The output from the filter is peak detected and applied both to the first input of a comparator and to a unique variable threshold circuit which, in turn, is coupled to the remaining comparator input. The threshold circuit tracks the peak detected level of the bandpass filter output such that the comparator is activated between its logic states, representing the detect or undetect condition, with a minimum of delay time.