Abstract: In a general aspect, a packaged semiconductor device can include a semiconductor die having at least a first terminal on a first side of the semiconductor die and a second terminal on a second side of the semiconductor die. The device can include a leadframe portion electrically coupled to the first terminal of the semiconductor die and a clip portion electrically coupled to the second terminal of the semiconductor die. The device can include a molding compound. A surface of the leadframe portion and a first surface of the molding compound can define at least a portion of a first surface of the device. A surface of the clip portion and a second surface of the molding compound can define at least a portion of a second surface of the device that is parallel to the first surface of the device.

Abstract: In a general aspect, a packaged semiconductor device can include a semiconductor die having at least a first terminal on a first side of the semiconductor die and a second terminal on a second side of the semiconductor die. The device can include a leadframe portion electrically coupled to the first terminal of the semiconductor die and a clip portion electrically coupled to the second terminal of the semiconductor die. The device can include a molding compound. A surface of the leadframe portion and a first surface of the molding compound can define at least a portion of a first surface of the device. A surface of the clip portion and a second surface of the molding compound can define at least a portion of a second surface of the device that is parallel to the first surface of the device.

Abstract: Disclosed are PQFN semiconductor die packages for high-voltage, high-power applications, systems using the packages, and methods of making the packages. An exemplary package comprises a leadframe, a semiconductor die disposed on the leadframe, and a heat sink member disposed on the semiconductor die and the leadframe and integrated into the molding material of the package. The heat sink member has an electrically insulating substrate with a high breakdown voltage, and one or more conductive layers disposed on a first surface of the substrate that electrically interconnect the semiconductor to one or more leads of the leadframe.

Abstract: Disclosed are PQFN semiconductor die packages for high-voltage, high-power applications, systems using the packages, and methods of making the packages. An exemplary package comprises a leadframe, a semiconductor die disposed on the leadframe, and a heat sink member disposed on the semiconductor die and the leadframe and integrated into the molding material of the package. The heat sink member has an electrically insulating substrate with a high breakdown voltage, and one or more conductive layers disposed on a first surface of the substrate that electrically interconnect the semiconductor to one or more leads of the leadframe.

Abstract: Disclosed are spring structures that provide solderless electrical connections in semiconductor die packages. An exemplary spring structure comprises a first portion adapted to make an electrical connection to a conductive region of a semiconductor die, a second portion adapted to make an electrical connection to a conductive region of a leadframe, and a third portion disposed between the first and second portions. During a molding process, the third portion is compressively strained to impart forces to the first and second portions that maintain these portions in contact with the conductive regions of the die and leadframe. After the molding material sets, the third portion remains in a state of compressive strain, and imparts forces on the first and second portions that maintain the electrical connections. The spring structure may be made of less expensive materials, and does not require cleaning, fluxing, or reflowing, thereby reducing manufacturing cost and time.

Abstract: A method for making a semiconductor die package is disclosed. In some embodiments, the method includes using a leadframe structure including at least one lead structure having a lead surface. A semiconductor die having a first surface and a second surface is attached to the leadframe structure. The first surface of the semiconductor die is substantially planar to the lead surface and the second surface of the semiconductor die is coupled to the leadframe structure. A layer of conductive material is formed on the lead surface and the first surface of the semiconductor die to electrically couple the at least one lead structure to the semiconductor die.