Patents by Inventor Armin Fischer
Armin Fischer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9455710Abstract: A clock enabling circuit for providing a gated clock signal in response to receiving clock request information is presented. The clock enabling circuit comprises a clock request input, a clock input, and a flip-flop stage. It also includes a first sub-circuitry comprising a first input being coupled with the clock request input and an output being coupled with the flip-flop stage for providing a set information to the flip-flop stage in response to the receipt of the clock request information, the flip-flop stage being configured to provide a clock enabling information in response to receiving the set information and a second sub-circuitry comprising a first and a second input, the first input being coupled with the clock input and the second input being coupled with the flip-flop stage, the second sub-circuitry comprising an output for providing the gated clock signal in response to receiving the clock enabling information.Type: GrantFiled: September 19, 2014Date of Patent: September 27, 2016Assignee: Dialog Semiconductor (UK) LimitedInventors: Joachim Riexinger, Armin Fischer
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Publication number: 20150288363Abstract: A clock enabling circuit for providing a gated clock signal in response to receiving clock request information is presented. The clock enabling circuit comprises a clock request input, a clock input, and a flip-flop stage. It also includes a first sub-circuitry comprising a first input being coupled with the clock request input and an output being coupled with the flip-flop stage for providing a set information to the flip-flop stage in response to the receipt of the clock request information, the flip-flop stage being configured to provide a clock enabling information in response to receiving the set information and a second sub-circuitry comprising a first and a second input, the first input being coupled with the clock input and the second input being coupled with the flip-flop stage, the second sub-circuitry comprising an output for providing the gated clock signal in response to receiving the clock enabling information.Type: ApplicationFiled: September 19, 2014Publication date: October 8, 2015Inventors: Joachim Riexinger, Armin Fischer
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Publication number: 20150228436Abstract: A fuse may be provided, which may include: a first fuse link; a second fuse link coupled in series to the first fuse link; and a connection element coupled between the first and second fuse links and disposed in the same level as the first and second fuse links.Type: ApplicationFiled: January 30, 2015Publication date: August 13, 2015Inventors: Franz Ungar, Gunther Lehmann, Armin Fischer, Alexander Von Glasow, Sascha Siegler
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Patent number: 8667204Abstract: Systems and methods for providing a differentiation of two identical slave devices on a same I2C bus without any hardware (e.g. additional ID pins) or software overhead are disclosed. Each identical slave device is connected to the SDA/SCL lanes by interchanging its SDA/SCL ports. It is up to the slave device to detect its signal connectivity to the SDA/SCL lanes of the I2C bus. The slave devices detect the signal connectivity by interpreting the I2C transfer in normal and interchanged connectivity.Type: GrantFiled: January 24, 2011Date of Patent: March 4, 2014Assignee: RPX CorporationInventors: Armin Fischer, Joachim Riexinger, Frank Kronmueller
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Patent number: 8487453Abstract: A semiconductor device includes a semiconductor chip. External connection pads and further pads are disposed over a surface of the semiconductor chip. Selected ones of the further pads are electrically connected to one another so as to activate selected functions within the semiconductor chip.Type: GrantFiled: February 22, 2011Date of Patent: July 16, 2013Assignee: Infineon Technologies AGInventors: Armin Fischer, Alexander Von Glasow
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Patent number: 8323991Abstract: A device and method are provided for detecting stress migration properties of a semiconductor module mounted in a housing. A stress migration test (SMT) structure is formed in the semiconductor module. An integrated heating (IH) device is formed within or in direct proximity to the SMT structure. The SMT structure includes a first interconnect region in a first interconnect layer, a second interconnect region in a second interconnect layer, and a connecting region electrically connecting the interconnect regions through a first insulating layer. The IH device includes a heating interconnect region through which a heating current flows. The heating interconnect region is within or outside the first or second interconnect region or connecting region. When the heating current is applied, a measurement voltage is applied to the SMT structure, and a current through the SMT structure is measured to detect stress migration properties of the semiconductor module.Type: GrantFiled: December 29, 2010Date of Patent: December 4, 2012Assignee: Infineon Technologies AGInventors: Armin Fischer, Alexander Von Glasow, Jochen Von Hagen
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Patent number: 8314452Abstract: Structures and methods of forming an ideal MIM capacitor are disclosed. The single capacitor includes a first and a second metal structure overlying a substrate, a first dielectric material disposed between a first portion of the first metal structure and a first portion of the second metal structure. A second dielectric material is disposed between a second portion of the first metal structure and a second portion of the second metal structure. No first dielectric material is disposed between the second portion of the first and second metal structures, and no second dielectric material is disposed between the first portion of the first and second metal structures. The first and second dielectric material layers include materials with opposite coefficient of capacitance.Type: GrantFiled: December 22, 2011Date of Patent: November 20, 2012Assignee: Infineon Technologies AGInventors: Philipp Riess, Armin Fischer
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Publication number: 20120191889Abstract: Systems and methods for providing a differentiation of two identical slave devices on a same I2C bus without any hardware (e.g. additional ID pins) or software overhead are disclosed. Each identical slave device is connected to the SDA/SCL lanes by interchanging its SDA/SCL ports. It is up to the slave device to detect its signal connectivity to the SDA/SCL lanes of the I2C bus. The slave devices detect the signal connectivity by interpreting the I2C transfer in normal and interchanged connectivity.Type: ApplicationFiled: January 24, 2011Publication date: July 26, 2012Inventors: Armin Fischer, Joachim Riexinger, Frank Kronmueller
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Patent number: 8211720Abstract: A device and method are provided for detecting stress migration properties of a semiconductor module mounted in a housing. A stress migration test (SMT) structure is formed in the semiconductor module. An integrated heating (IH) device is formed within or in direct proximity to the SMT structure. The SMT structure includes a first interconnect region in a first interconnect layer, a second interconnect region in a second interconnect layer, and a connecting region electrically connecting the interconnect regions through a first insulating layer. The IH device includes a heating interconnect region through which a heating current flows. The heating interconnect region is within or outside the first or second interconnect region or connecting region. When the heating current is applied, a measurement voltage is applied to the SMT structure, and a current through the SMT structure is measured to detect stress migration properties of the semiconductor module.Type: GrantFiled: December 29, 2010Date of Patent: July 3, 2012Assignee: Infineon Technologies AGInventors: Armin Fischer, Alexander Von Glasow, Jochen Von Hagen
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Publication number: 20120091560Abstract: Structures and methods of forming an ideal MIM capacitor are disclosed. The single capacitor includes a first and a second metal structure overlying a substrate, a first dielectric material disposed between a first portion of the first metal structure and a first portion of the second metal structure. A second dielectric material is disposed between a second portion of the first metal structure and a second portion of the second metal structure. No first dielectric material is disposed between the second portion of the first and second metal structures, and no second dielectric material is disposed between the first portion of the first and second metal structures. The first and second dielectric material layers include materials with opposite coefficient of capacitance.Type: ApplicationFiled: December 22, 2011Publication date: April 19, 2012Applicant: Infineon Techonlogies AGInventors: Philipp Riess, Armin Fischer
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Patent number: 8101495Abstract: Structures and methods of forming an ideal MIM capacitor are disclosed. The single capacitor includes a first and a second metal structure overlying a substrate, a first dielectric material disposed between a first portion of the first metal structure and a first portion of the second metal structure. A second dielectric material is disposed between a second portion of the first metal structure and a second portion of the second metal structure. No first dielectric material is disposed between the second portion of the first and second metal structures, and no second dielectric material is disposed between the first portion of the first and second metal structures. The first and second dielectric material layers include materials with opposite coefficient of capacitance.Type: GrantFiled: March 13, 2008Date of Patent: January 24, 2012Assignee: Infineon Technologies AGInventors: Philipp Riess, Armin Fischer
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Patent number: 7998828Abstract: A method of forming a metal ion transistor comprises forming a first electrode in a first isolation layer; forming a second isolation layer over the first isolation layer; forming a first cell region of a low dielectric constant (low-k) dielectric over the first electrode in the second isolation layer, the first cell region isolated from the second isolation layer; forming a cap layer over the second isolation layer and the first cell region, at least thinning the cap layer over the first cell region; depositing a layer of the low-k dielectric over the second isolation layer and the first cell region; forming metal ions in the low-k dielectric layer; patterning the low-k dielectric layer to form a second cell region; sealing the second cell region using a liner; and forming a second electrode contacting the second cell region and a third electrode contacting the second cell region.Type: GrantFiled: March 17, 2010Date of Patent: August 16, 2011Assignees: International Business Machines Corporation, Infineon Technologies North AmericaInventors: Fen Chen, Armin Fischer
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Publication number: 20110140236Abstract: A semiconductor device includes a semiconductor chip. External connection pads and further pads are disposed over a surface of the semiconductor chip. Selected ones of the further pads are electrically connected to one another so as to activate selected functions within the semiconductor chip.Type: ApplicationFiled: February 22, 2011Publication date: June 16, 2011Inventors: Armin Fischer, Alexander Von Glasow
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Publication number: 20110097826Abstract: A device and method are provided for detecting stress migration properties of a semiconductor module mounted in a housing. A stress migration test (SMT) structure is formed in the semiconductor module. An integrated heating (IH) device is formed within or in direct proximity to the SMT structure. The SMT structure includes a first interconnect region in a first interconnect layer, a second interconnect region in a second interconnect layer, and a connecting region electrically connecting the interconnect regions through a first insulating layer. The IH device includes a heating interconnect region through which a heating current flows. The heating interconnect region is within or outside the first or second interconnect region or connecting region. When the heating current is applied, a measurement voltage is applied to the SMT structure, and a current through the SMT structure is measured to detect stress migration properties of the semiconductor module.Type: ApplicationFiled: December 29, 2010Publication date: April 28, 2011Applicant: Infineon Technologies AGInventors: Armin Fischer, Alexander Von Glasow, Jochen von Hagen
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Patent number: 7919363Abstract: A semiconductor device includes a semiconductor chip. External connection pads and further pads are disposed over a surface of the semiconductor chip. Selected ones of the further pads are electrically connected to one another so as to activate selected functions within the semiconductor chip.Type: GrantFiled: April 21, 2006Date of Patent: April 5, 2011Assignee: Infineon Technologies AGInventors: Armin Fischer, Alexander Von Glasow
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Patent number: 7888672Abstract: A device and method are provided for detecting stress migration properties of a semiconductor module mounted in a housing. A stress migration test (SMT) structure is formed in the semiconductor module. An integrated heating (IH) device is formed within or in direct proximity to the SMT structure. The SMT structure includes a first interconnect region in a first interconnect layer, a second interconnect region in a second interconnect layer, and a connecting region electrically connecting the interconnect regions through a first insulating layer. The IH device includes a heating interconnect region through which a heating current flows. The heating interconnect region is within or outside the first or second interconnect region or connecting region. When the heating current is applied, a measurement voltage is applied to the SMT structure, and a current through the SMT structure is measured to detect stress migration properties of the semiconductor module.Type: GrantFiled: May 19, 2005Date of Patent: February 15, 2011Assignee: Infineon Technologies AGInventors: Armin Fischer, Alexander von Glasow, Jochen von Hagen
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Patent number: 7859025Abstract: A metal ion transistor and related methods are disclosed. In one embodiment, the metal ion transistor includes a cell positioned in at least one isolation layer, the cell including a metal ion doped low dielectric constant (low-k) dielectric material sealed from each adjacent isolation layer; a first electrode contacting the cell on a first side; a second electrode contacting the cell on a second side; and a third electrode contacting the cell on a third side, wherein each electrode is isolated from each other electrode.Type: GrantFiled: December 6, 2007Date of Patent: December 28, 2010Assignees: International Business Machines Corporation, Infineon Technologies North America CorporationInventors: Fen Chen, Armin Fischer
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Publication number: 20100184280Abstract: A method of forming a metal ion transistor comprises forming a first electrode in a first isolation layer; forming a second isolation layer over the first isolation layer; forming a first cell region of a low dielectric constant (low-k) dielectric over the first electrode in the second isolation layer, the first cell region isolated from the second isolation layer; forming a cap layer over the second isolation layer and the first cell region, at least thinning the cap layer over the first cell region; depositing a layer of the low-k dielectric over the second isolation layer and the first cell region; forming metal ions in the low-k dielectric layer; patterning the low-k dielectric layer to form a second cell region; sealing the second cell region using a liner; and forming a second electrode contacting the second cell region and a third electrode contacting the second cell region.Type: ApplicationFiled: March 17, 2010Publication date: July 22, 2010Inventors: Fen Chen, Armin Fischer
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Publication number: 20090230507Abstract: Structures and methods of forming an ideal MIM capacitor are disclosed. The single capacitor includes a first and a second metal structure overlying a substrate, a first dielectric material disposed between a first portion of the first metal structure and a first portion of the second metal structure. A second dielectric material is disposed between a second portion of the first metal structure and a second portion of the second metal structure. No first dielectric material is disposed between the second portion of the first and second metal structures, and no second dielectric material is disposed between the first portion of the first and second metal structures. The first and second dielectric material layers include materials with opposite coefficient of capacitance.Type: ApplicationFiled: March 13, 2008Publication date: September 17, 2009Inventors: Philipp Riess, Armin Fischer
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Patent number: RE41684Abstract: A set of integrated capacitor arrangements is presented, each of which has a circuitry-effective main capacitor and a connectable correction capacitor. Each capacitor arrangement has an electrically conductive antifuse connection and antifuse interruption between the correction capacitor and the main capacitor, which are produced after the main capacitor has been formed. The connection and interruption enable the capacitance of the capacitor arrangement to be corrected.Type: GrantFiled: June 12, 2003Date of Patent: September 14, 2010Assignee: Infineon Technologies AGInventors: Armin Fischer, Franz Ungar