Patents by Inventor Arnab Paul

Arnab Paul has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250033203
    Abstract: A robotic system includes a robotic arm having an end effector to move a plurality of articles from a first location to a second location, a first sensor attached to the end effector, and a processor communicably coupled to the first sensor. The processor is provided to actuate the end effector to lift an article from the first location, receive a first input from the first sensor in response to the end effector lifting the article from the first location, calculate a mass of the article based at least on the first input, and control a speed and acceleration of movement of the robotic arm towards the second location, based on the calculated mass of the article. Methods of controlling the robotic system are also disclosed.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 30, 2025
    Inventors: Patrick William Lewis, Arnab Paul
  • Patent number: 11714977
    Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: August 1, 2023
    Assignee: Intel Corporation
    Inventors: Gautham Chinya, Shihao Ji, Arnab Paul
  • Patent number: 11663449
    Abstract: Techniques and mechanisms for providing a logical state machine with a spiking neural network which includes multiple sets of nodes. Each of the multiple sets of nodes is to implement a different respective state, and each of the multiple spike trains is provided to respective nodes of each of the multiple sets of nodes. A given state of the logical state machine is implemented by configuring respective activation modes of each node of the corresponding set of nodes. The activation mode of a given node enables that node to signal, responsive to its corresponding spike train, that a respective state transition of the logical state machine is to be performed. In another embodiment, the multiple spike trains each represent a different respective character in a system used by data evaluated with the spiking neural network.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: May 30, 2023
    Assignee: Intel Corporation
    Inventors: Arnab Paul, Narayan Srinivasa
  • Patent number: 11636318
    Abstract: Techniques and mechanisms for servicing a search query using a spiking neural network. In an embodiment, a spiking neural network receives an indication of a first context of the search query, wherein a set of nodes of the spiking neural network each correspond to a respective entry of a repository. One or more nodes of the set of nodes are each excited to provide a respective cyclical response based on the first context, wherein a first cyclical response is by a first node. Due at least in part to a coupling of the excited nodes, a perturbance signal, based on a second context of the search query, results in a change of the first resonance response relative to one or more other resonance responses. In another embodiment, data corresponding to the first node is selected, based on the change, as an at least partial result of the search query.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: April 25, 2023
    Assignee: Intel Corporation
    Inventors: Arnab Paul, Narayan Srinivasa
  • Patent number: 11568241
    Abstract: Techniques and mechanisms for determining the value of a weight associated with a synapse of a spiking neural network. In an embodiment, a first spike train and a second spike train are output, respectively, by a first node and a second node of the spiking neural network, wherein the synapse is coupled between said nodes. The weight is applied to signaling communicated via the synapse. A value of the weight is updated based on a product of a first value and a second value, wherein the first value is based on a first rate of spiking by the first spike train, and the second value is based on a second rate of spiking by the second spike train. In another embodiment, the weight is updated based on a product of a derivative of the first rate of spiking and a derivative of the second rate of spiking.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: January 31, 2023
    Assignee: Intel Corporation
    Inventors: Arnab Paul, Narayan Srinivasa
  • Patent number: 11544564
    Abstract: Techniques and mechanisms for performing a Bayesian inference with a spiking neural network. In an embodiment, a parent node of the spiking neural network receives a first bias signal which is periodic. The parent node communicates a likelihood signal to a child node, wherein the parent node and the child node correspond to a first condition and a second condition, respectively. Based on a phase change which is applied to the first bias signal, the likelihood signal indicates a probability of the first condition. The child node also receives a signal which indicates an instance of the second condition. Based on the indication and a second bias signal, the child node signals to the first node that an adjustment is to be made to the phase change applied to the first bias signal. After the adjustment, the likelihood signal indicates an updated probability of the first condition.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: January 3, 2023
    Assignee: Intel Corporation
    Inventors: Arnab Paul, Narayan Srinivasa
  • Publication number: 20220108093
    Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
    Type: Application
    Filed: December 17, 2021
    Publication date: April 7, 2022
    Applicant: Intel Corporation
    Inventors: Gautham Chinya, Shihao Ji, Arnab Paul
  • Patent number: 11232273
    Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: January 25, 2022
    Assignee: Intel Corporation
    Inventors: Gautham Chinya, Shihao Ji, Arnab Paul
  • Publication number: 20210027029
    Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
    Type: Application
    Filed: October 12, 2020
    Publication date: January 28, 2021
    Applicant: Intel Corporation
    Inventors: Gautham Chinya, Shihao Ji, Arnab Paul
  • Patent number: 10867142
    Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: December 15, 2020
    Assignee: Intel Corporation
    Inventors: Gautham Chinya, Shihao Ji, Arnab Paul
  • Publication number: 20200342321
    Abstract: Techniques and mechanisms for performing a Bayesian inference with a spiking neural network. In an embodiment, a parent node of the spiking neural network receives a first bias signal which is periodic. The parent node communicates a likelihood signal to a child node, wherein the parent node and the child node correspond to a first condition and a second condition, respectively. Based on a phase change which is applied to the first bias signal, the likelihood signal indicates a probability of the first condition. The child node also receives a signal which indicates an instance of the second condition. Based on the indication and a second bias signal, the child node signals to the first node that an adjustment is to be made to the phase change applied to the first bias signal. After the adjustment, the likelihood signal indicates an updated probability of the first condition.
    Type: Application
    Filed: February 23, 2018
    Publication date: October 29, 2020
    Applicant: Intel Corporation
    Inventors: Arnab Paul, Narayan Srinivasa
  • Publication number: 20200272884
    Abstract: Techniques and mechanisms for servicing a search query using a spiking neural network. In an embodiment, a spiking neural network receives an indication of a first context of the search query, wherein a set of nodes of the spiking neural network each correspond to a respective entry of a repository. One or more nodes of the set of nodes are each excited to provide a respective cyclical response based on the first context, wherein a first cyclical response is by a first node. Due at least in part to a coupling of the excited nodes, a perturbance signal, based on a second context of the search query, results in a change of the first resonance response relative to one or more other resonance responses. In another embodiment, data corresponding to the first node is selected, based on the change, as an at least partial result of the search query.
    Type: Application
    Filed: December 15, 2017
    Publication date: August 27, 2020
    Applicant: INTEL CORPORATION
    Inventors: Arnab PAUL, Narayan SRINIVASA
  • Publication number: 20200265290
    Abstract: Techniques and mechanisms for providing a logical state machine with a spiking neural network which includes multiple sets of nodes. Each of the multiple sets of nodes is to implement a different respective state, and each of the multiple spike trains is provided to respective nodes of each of the multiple sets of nodes. A given state of the logical state machine is implemented by configuring respective activation modes of each node of the corresponding set of nodes. The activation mode of a given node enables that node to signal, responsive to its corresponding spike train, that a respective state transition of the logical state machine is to be performed. In another embodiment, the multiple spike trains each represent a different respective character in a system used by data evaluated with the spiking neural network.
    Type: Application
    Filed: December 15, 2017
    Publication date: August 20, 2020
    Applicant: Intel Corporation
    Inventors: Arnab Paul, Narayan Srinivasa
  • Publication number: 20200218977
    Abstract: Techniques and mechanisms for determining the value of a weight associated with a synapse of a spiking neural network. In an embodiment, a first spike train and a second spike train are output, respectively, by a first node and a second node of the spiking neural network, wherein the synapse is coupled between said nodes. The weight is applied to signaling communicated via the synapse. A value of the weight is updated based on a product of a first value and a second value, wherein the first value is based on a first rate of spiking by the first spike train, and the second value is based on a second rate of spiking by the second spike train. In another embodiment, the weight is updated based on a product of a derivative of the first rate of spiking and a derivative of the second rate of spiking.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 9, 2020
    Applicant: INTEL CORPORATION
    Inventors: Arnab PAUL, Narayan SRINIVASA
  • Patent number: 10679119
    Abstract: The present disclosure provides for generating a spiking neural network. Generating a spiking neural network can include determining that a first input fan-in from a plurality of input neurons to each of a plurality of output neurons is greater than a threshold, generating a plurality of intermediate neurons based on a determination that the first input fan-in is greater than the threshold, and coupling the plurality of intermediate neurons to the plurality of input neurons and the plurality of output neurons, wherein each of the plurality of intermediate neurons has a second input fan-in that is less than the first input fan-in and each of the plurality of output neurons has a third input fan-in that is less than the first input fan-in.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: June 9, 2020
    Assignee: INTEL CORPORATION
    Inventors: Arnab Paul, Narayan Srinivasa
  • Patent number: 10305976
    Abstract: A method for managing computing includes replicating a subset of a machine state of a first computing device onto a second computing device, wherein the subset of the machine state is required to execute machine code. Execution of the machine code is offloaded to the second computing device.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: May 28, 2019
    Assignee: Intel Corporation
    Inventors: Chit Kwan Lin, Arnab Paul, Gautham N. Chinya
  • Publication number: 20190130148
    Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
    Type: Application
    Filed: June 29, 2016
    Publication date: May 2, 2019
    Inventors: Gautham Chinya, Shihao Ji, Arnab Paul
  • Publication number: 20180276530
    Abstract: Embodiments described herein describe object recognition using a spiking neural network. Object recognition using a spiking neural network can include processing each of the plurality of base templates through a plurality of input neurons to generate a plurality of first spikes through the plurality of input neurons, providing the plurality of first spikes from the plurality of input neurons to each of a plurality of excitatory neurons (E-neurons), providing a plurality of second spikes from a plurality of inhibitory neurons (I-neurons) to the plurality of E-neurons to inhibit a spiking rate of the E-neurons, generating a plurality of weights at each of the plurality of E-neurons based on the plurality of first spikes and the plurality of second spikes, and classifying a pattern utilizing the plurality of input neurons, the plurality of E-neurons, and the plurality of weights at each of the E-neurons.
    Type: Application
    Filed: March 24, 2017
    Publication date: September 27, 2018
    Applicant: INTEL CORPORATION
    Inventors: Arnab Paul, Narayan Srinivasa
  • Publication number: 20180276529
    Abstract: The present disclosure provides for generating a spiking neural network. Generating a spiking neural network can include determining that a first input fan-in from a plurality of input neurons to each of a plurality of output neurons is greater than a threshold, generating a plurality of intermediate neurons based on a determination that the first input fan-in is greater than the threshold, and coupling the plurality of intermediate neurons to the plurality of input neurons and the plurality of output neurons, wherein each of the plurality of intermediate neurons has a second input fan-in that is less than the first input fan-in and each of the plurality of output neurons has a third input fan-in that is less than the first input fan-in.
    Type: Application
    Filed: March 24, 2017
    Publication date: September 27, 2018
    Applicant: INTEL CORPORATION
    Inventors: Arnab Paul, Narayan Srinivasa
  • Publication number: 20170185898
    Abstract: Technologies for distributed machine learning include a mobile compute device to identify an input dataset including a plurality of dataset elements for machine learning and select a subset of the dataset elements. The mobile compute device transmits the subset to a cloud server for machine learning and receives, from the cloud server, a set of learned parameters for local data classification in response to transmitting the subset to the cloud server. The learned parameters are based on an expansion of features extracted by the cloud server from the subset of the dataset elements.
    Type: Application
    Filed: December 26, 2015
    Publication date: June 29, 2017
    Inventors: Arnab Paul, Gautham Chinya