Abstract: The present disclosure relates to a high voltage (HV) installation, comprising a plurality of power electronic cells, in particular power electronic switching cells, configured to operate at different electrical potentials, each power electronic cell comprising a cell-side transceiver with an antenna for receiving and/or transmitting high frequency (HF) communication signals, and a waveguide configured to carry and shield HF communication signals of the plurality of power electronic cells. The waveguide has a plurality of sections configured to leak HF communication signals present in the waveguide into a corresponding plurality of adjoining areas and vice versa. Each power electronic cell of the plurality of power electronic cells is arranged physically separated and in proximity to the waveguide, such that the respective power electronic cell is electrically insulated from the waveguide and the antenna of the respective cell-side transceivers is arranged in the respective adjoining area.

Abstract: A power semiconductor module includes a main substrate and power semiconductor chips. Each power semiconductor chip is bonded to the main conductive layer with the first power electrode. A first group of the power semiconductor chips is connected in parallel via the second power electrodes and a second group of the power semiconductor chips is connected in parallel via the second power electrodes. The module also includes a first insulation layer and a first conductive layer overlying the first insulation layer as well as a second insulation layer and a second conductive layer overlying the second insulation layer. The first conductive layer provides a first gate conductor area and a first auxiliary emitter conductor area for the first group. The second conductive layer provides a second gate conductor area and a second auxiliary emitter conductor area for the second group.

Abstract: A power module (1) comprises a first switch (2) comprising a first switch element (9) and an associated first diode (10), a second switch (3) comprising a second switch element (11) and an associated second diode (12), the first and second switches (2, 3) being electrically connected to form a half-bridge, wherein the switch elements (9, 11) and diodes (10, 12) are located next to each other, wherein the second switch element (11) and second diode (12) are located between the first switch element (9) and the first diode (10).

Abstract: A converter apparatus includes a string of electrically interconnected modules that includes a first group of modules comprising a first module and a second group of modules comprising a second module. A first screen is connected to a first defined electric potential and is located adjacent the first group of modules and a second screen is connected to a second defined electric potential and is located adjacent the second group of modules. During operation of the converter apparatus a resonance loop is created from the first module via the first and second screens and the second module back to the first module. A damping unit is located in the resonance loop and is set to dampen electromagnetic noise.

Abstract: A power semiconductor module includes a substrate with a metallization layer that is structured. A semiconductor chip having a first side bonded to the metallization layer. A metal clip, which is a strip of metal, has a first planar part bonded to a second side of the semiconductor chip opposite to the first side. The metal clip also has a second planar part bonded to the metallization layer. A mold encapsulation at least partially encloses the substrate and the metal clip. The mold encapsulation has a recess approaching towards the first planar part of the metal clip. The semiconductor chip is completely enclosed by the mold encapsulation, the substrate and the metal clip and the first planar part of the metal clip is at least partially exposed by the recess. A sensor is accommodated in the recess.

Abstract: A power semiconductor module includes a plurality of semiconductor switches arranged in a plurality of groups. Each semiconductor switch has a first terminal and a second terminal having a controlled path therebetween and a control terminal. A plurality of first group contacts are each connected to the first terminals of the semiconductor switches of a respective group and a plurality of second group contacts are each connected to the second terminals of the semiconductor switches of the respective group. A plurality of control group contacts are each connected to the control terminals of the semiconductor switches of the respective group. An interconnection bridge connects the control group contacts and the first group contacts of the plurality of groups. The interconnection bridge has a layer structure with a first conductive layer and a second conductive layer being separated by an insulating layer.

Abstract: A converter apparatus includes a string of electrically interconnected modules that includes a first group of modules comprising a first module and a second group of modules comprising a second module. A first screen is connected to a first defined electric potential and is located adjacent the first group of modules and a second screen is connected to a second defined electric potential and is located adjacent the second group of modules. During operation of the converter apparatus a resonance loop is created from the first module via the first and second screens and the second module back to the first module. A damping unit is located in the resonance loop and is set to dampen electromagnetic noise.

Abstract: A power semiconductor module includes a main substrate and power semiconductor chips. Each power semiconductor chip is bonded to the main conductive layer with the first power electrode. A first group of the power semiconductor chips is connected in parallel via the second power electrodes and a second group of the power semiconductor chips is connected in parallel via the second power electrodes. The module also includes a first insulation layer and a first conductive layer overlying the first insulation layer as well as a second insulation layer and a second conductive layer overlying the second insulation layer. The first conductive layer provides a first gate conductor area and a first auxiliary emitter conductor area for the first group. The second conductive layer provides a second gate conductor area and a second auxiliary emitter conductor area for the second group.