Abstract: An electronic tuner generates a pulse train signal from an analog signal transduced from vibrations on a selected one of several strings of a musical instrument. The pulse train signal has a plurality of successive pulses, each of the pulses having a pulse width which may vary between successive pulses. Two of the pulses have a longest pulse width of all pulses in the pulse string are identified. The tuner then computes a current fundamental frequency on the selected string as a function of a ratio between a numerical count of the pulses occurring between these two pulses, the count including one of these pulses, and a sum of the pulse width of each of the pulses included in the count. The two of the pulses have a longest pulse width of all pulses in the pulse string. A difference signal is developed as a function of a difference between the current fundamental frequency and a known in-tune frequency associated with the selected string being tuned.

Abstract: A parity predict circuit for an M-level N'th power Galois arithmetic gate using binary logic elements and a method of the designing thereof is disclosed. The method involves an algorithm that the logic designer utilizes to visually analyze the output of the arithmetic gate using a heuristic technique to determine the procedure for intercoupling the outputs of the gate's 1 through m-1 levels of parity trees as inputs to the parity predict parity tree. This visual analysis obviates the laborious mathematical treatment of the arithmetic gate priorly utilized to design a parity predict network.