Abstract: Disclosed is an electrostatic discharge protection transistor having low input capacitance and method for making the same. The electrostatic discharge protection transistor includes a semiconductor substrate having a diffusion well and a source that is defined in the diffusion well. Further included is a drain that has a first sidewall, a second sidewall, and a lower diffusion floor. The first sidewall is located proximate to a channel region that lies between the source and the drain. Also, a polysilicon gate is disposed over the surface of the semiconductor substrate such that the polysilicon gate is defined between the source and the drain. Wherein the first sidewall of the drain is defined in the diffusion well and the lower diffusion floor of the drain is defined outside of the diffusion well and inside the semiconductor substrate.

Abstract: A lightweight energy-absorbing structure is comprised of a laminate including a plurality of fabrics, pre-impregnated with a thermosetting resin, abutting against a core of cellular foam treated with a charge of filled bonding material. The resulting mixed materials are compressed between two die members while heat is applied to the dies thereby single curing the thermosetting resin and bonding material. Individual sheets of fabric may have a predetermined orientation to increase impact resistance. In a preferred embodiment polyimide open-cell foam may be employed.

Abstract: A thermal detection and alarm system for indicating the irradiation of a surface by a heat source such as a laser beam has been invented. The detector element may form an integral portion of the vehicle's outer surface or may be parasitically mounted thereto. The proposed system is light weight, energy efficient, durable and highly sensitive. The invention is especially suited for use with Boron-Tungsten composite surfaces as found on aircraft and spacecraft.

Abstract: A protective circuit for integrated circuits having insulated gate field-effect transistors is disclosed which prevents high potentials resulting from manufacturing, installation, handling, testing or operation from damaging the gate oxide of the field-effect transistors and protective diodes associated with the input of the integrated circuit. The protective circuit includes a first vertical bipolar transistor which has its emitter-to-collector circuit connected in parallel with a first protective diode so that the anode of the diode is connected to the emitter and the input and the cathode of the diode is coupled to the collector and the drain power supply terminal of the field-effect transistors. The inherent distributed resistance of a doped region located within the substrate of the integrated circuit is coupled between the input and the base of the first bipolar transistor.

Abstract: A monolithic, amplitude and phase programmable matched filter device capable of generating and detecting biphase coded, pseudo random waveforms. Surface wave and metal oxide semiconductor (MOS) technologies are combined to develop an integrated filter structure having either a read only memory (ROM) or a digital shift register controlled thirty one-bit-silicon-MOSFET biphase tap structure. The use of silicon MOSFETs are piezoresistive surface wave detectors and the ROM structure provide the capability for generating and correlating 31-bit pseudo random (PN) sequences at a carrier frequency of 100 megaHertz. A 62 stage bucket brigade device array is utilized for controlling the amplitudes of the contiguous signal generation by random selection of codes from the 6.times.31 bit are at ROM.

Abstract: Combined junction and metallization morphology for achieving high-voltage capability in a shallow integrated bipolar transistor. The improvement comprises closely spaced emitter and base metallization in conjunction with a convexity in the surface portion of the collector-base p-n junction.