Patents by Inventor Arnon A. Friedmann

Arnon A. Friedmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6557136
    Abstract: A digital encoding subsystem encodes binary input data, which comprises payload data. The subsystem facilitates the preservation of the payload data destined for a temporary holding media, such as a transmission media or a storage media. A scrambler receives and scrambles given binary input data to produce given scrambled data. A criteria checker determines whether the given scrambled data satisfies desired criteria. The criteria may comprise a k-constraint, which represents the maximum number of consecutive zeros in a block of the given scrambled data. A de-scrambler receives and unscrambles the given scrambled data to produce given output data. A scramble modifier may be provided which changes the given scrambled data until the given scrambled data satisfies the desired criteria.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: April 29, 2003
    Assignee: Maxtor Corporation
    Inventor: Arnon Friedmann
  • Publication number: 20030067865
    Abstract: Through the use of feedback in determining frequency domain equalization, intersymbol interference can be reduced. Specifically, the determined constellation point closest to the determined received point can be fed back to aid in determining one or more other closest constellation points.
    Type: Application
    Filed: August 2, 2002
    Publication date: April 10, 2003
    Inventors: Richard W. Gross, Yan Yang, Mei Yong, Stuart Sandberg, Arnon Friedmann
  • Patent number: 6512644
    Abstract: A method and apparatus for Read-After-Write (RAW) verification with error tolerance is disclosed whereby upon read back of data from a medium, the actual read data can be compared to the actual write data, and the number of miscompares between the two can be counted. The severity of the number of miscompares can be determined depending on the Error Control Code (ECC) system used. If the error is correctable by the ECC system, the block need not be re-written to the medium. The invention provides the ability to increase medium capacity and throughput over previous implementations.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: January 28, 2003
    Assignee: Quantum Corporation
    Inventors: Dana Hall, Arnon Friedmann
  • Publication number: 20020196861
    Abstract: In a receiver transparent Q-mode, i.e., a Q-mode that is only implemented by a transmitter, the receiver is unaware of the Q-mode state of the transmitter. In this type of Q-mode configuration, the transmitter could enter and exit Q-mode as desired while the receiver, could, for example, continue to function as if operating normally, such as in “showtime.” Through this approach, it is not necessary for the receiver to detect the transmitter's entry and exit of Q-mode.
    Type: Application
    Filed: March 27, 2002
    Publication date: December 26, 2002
    Inventors: Marcos C. Tzannes, Arnon Friedmann
  • Publication number: 20020057734
    Abstract: Using a known or later developed time domain equalizer coefficient training algorithm, a least square solution for the time domain equalizer coefficients is taken at a starting point and iteratively improved on. In particular, the improvement is directed towards maximizing number of bits per frame loaded over the time domain equalizer coefficient choice. This can be accomplished by maximizing capacity directly rather than setting a goal to shorten the channel and hoping that the capacity will be maximized as a result.
    Type: Application
    Filed: October 19, 2001
    Publication date: May 16, 2002
    Inventors: Stuart D. Sandberg, Arnon Friedmann, Jelean Jovin, Bindhu Chandna
  • Publication number: 20020042899
    Abstract: Typical forward error correction methods employ Trellis Code Modulation. By substituting low density parity check coding in place of the convolution code as part of a combined modulation and encoding procedure, low density parity check coding and modulation can be performed. The low density parity check codes have no error floor, no cycles, an equal bit error rate for the information bits and the parity bits, and timely construction of both a parity check matrix with variable codeword size and a generator matrix is possible.
    Type: Application
    Filed: June 18, 2001
    Publication date: April 11, 2002
    Inventors: Marcos C. Tzannes, Arnon Friedmann, Todor Cooklev