Patents by Inventor Aroon V. Tungare

Aroon V. Tungare has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7217369
    Abstract: A meso-electromechanical system (900, 1100) includes a substrate (215), a standoff (405, 1160) disposed on a surface of the substrate, a first electrostatic pattern (205, 1105, 1110, 1115, 1120) disposed on the surface of the substrate, and a glass beam (810). The glass beam (810) has a fixed region (820) attached to the standoff and has a second electrostatic pattern (815, 1205, 1210, 1215, 1220) on a cantilevered location of the glass beam. The second electrostatic pattern is substantially co-extensive with and parallel to the first electrostatic pattern. The second electrostatic pattern has a relaxed separation (925) from the first electrostatic pattern when the first and second electrostatic patterns are in a non-energized state. In some embodiments, a mirror is formed by the electrostatic materials that form the second electrostatic pattern. The glass beam may be patterned using sandblasting (140).
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: May 15, 2007
    Assignee: Motorola, Inc.
    Inventors: Jovica Savic, Manes Eliacin, Junhua Liu, Aroon V. Tungare
  • Patent number: 7138068
    Abstract: A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating (1305, 1310) a ceramic oxide layer (510) overlying a conductive metal layer (515) overlying a printed circuit substrate (505), perforating (1320) the ceramic oxide layer within a region (705), and removing (1325) the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: November 21, 2006
    Assignee: Motorola, Inc.
    Inventors: Gregory J. Dunn, Robert T. Croswell, Jaroslaw A. Magera, Jovica Savic, Aroon V. Tungare
  • Patent number: 7130511
    Abstract: A flexible active signal cable (100, 200) includes a flexible printed circuit substrate (105), two electrical connectors (110), at least two metal conductors (115), at least one flexible optical waveguide (120), an optical transmitter (125), and an optical receiver (130). In some embodiments, the flexible active signal cable is less than 0.5 meters long and is capable of being wrapped and unwrapped from a 5 millimeter diameter mandrel 10,000 times with a low probability of failure at a test temperature, while supporting data rates greater than 25 megabits per second.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: October 31, 2006
    Assignee: Motorola, Inc.
    Inventors: Markus Riester, Zhiming Zhuang, J. Yu Huinan, Nasir Irfan, Aroon V. Tungare
  • Patent number: 7056800
    Abstract: One of a plurality of capacitors embedded in a printed circuit structure includes a first electrode (415) overlaying a first substrate layer (505) of the printed circuit structure, a crystallized dielectric oxide core (405) overlaying the first electrode, a second electrode (615) overlying the crystallized dielectric oxide core, and a high temperature anti-oxidant layer (220) disposed between and contacting the crystallized dielectric oxide core and at least one of the first and second electrodes. The crystallized dielectric oxide core has a thickness that is less than 1 micron and has a capacitance density greater than 1000 pF/mm2. The material and thickness are the same for each of the plurality of capacitors. The crystallized dielectric oxide core may be isolated from crystallized dielectric oxide cores of all other capacitors of the plurality of capacitors.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: June 6, 2006
    Assignee: Motorola, Inc.
    Inventors: Robert T. Croswell, Gregory J. Dunn, Robert B. Lempkowski, Aroon V. Tungare, Jovica Savic
  • Publication number: 20030021571
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 30, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Keryn Lian, Aroon V. Tungare, Barbara Foley Barenburg
  • Publication number: 20030021732
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 30, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Aroon V. Tungare, George T. Valliath
  • Publication number: 20030013219
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Electro-optic structures may be integrally provided with such semiconductor structures, which semiconductor structures may also include light-emitting devices and control circuitry.
    Type: Application
    Filed: July 13, 2001
    Publication date: January 16, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Aroon V. Tungare, George T. Valliath, Daniel R. Gamota
  • Publication number: 20010014705
    Abstract: Epoxy laminates incorporate up to 20 wt. % talc particles, particularly pure Montana platy talc particles having a maximum particle size of about 40 &mgr;m providing improved drilling performance, reduced dust formation, and improved Z-direction CTE, particularly when the epoxy resin has a Tg of about 150° C. or higher. The talc is selected from those which do not significantly reduce the electrical strength of the laminate relative to those which contain no talc particles. Characteristically, the talcs will have less than 5 wt. % impurities and less than 0.01 wt. % (100 wt.ppm) water extractable anions.
    Type: Application
    Filed: December 13, 2000
    Publication date: August 16, 2001
    Applicant: Isola Laminate Systems Corp.
    Inventors: Aroon V. Tungare, Scott H. Richgels, Jeffrey R. Kamala, Peggy M. Conn
  • Patent number: 5534565
    Abstract: Epoxy resin compositions used in preparation of laminates for electronic applications are free of the solvents typically needed in current industrial practice. The use of certain mono-substituted dicyandiamides makes possible the elimination of such solvents since all of the components are soluble in epoxy resin to an extent which provides uniform properties in the cured laminates.
    Type: Grant
    Filed: April 15, 1994
    Date of Patent: July 9, 1996
    Assignee: AlliedSignal Inc.
    Inventors: Joseph J. Zupancic, Jeffrey P. Conrad, Jiri D. Konicek, Aroon V. Tungare