Patents by Inventor Arpan P. Mahorowala

Arpan P. Mahorowala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7030008
    Abstract: Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithographic structure is also provided.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: April 18, 2006
    Assignee: International Business Machines Corporation
    Inventors: Scott D. Allen, Katherina E. Babich, Steven J. Holmes, Arpan P. Mahorowala, Dirk Pfeiffer, Richard Stephan Wise
  • Patent number: 6903023
    Abstract: A method for removing carbon from or stripping a TERA layer. The method includes exposing the TERA layer to a plasma containing an effective amount of nitrogen, and, optionally, oxygen or fluorine. The method is compatible with fluorine based etching systems, and may thus be performed in the same etching system as other etching steps. For example, the method may be performed in the same system as a fluorine based plasma etch for oxide or nitride. The invention includes the method of stripping a TERA layer, etching an oxide layer, and etching a nitride layer in situ in the same etching system. The method is performed at low ion energies to avoid damaging oxide or nitride layers under the TERA film and to provide good selectivity.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: June 7, 2005
    Assignee: International Business Machines Corporation
    Inventors: Richard S. Wise, Sadanand V. Deshpande, Wendy Yan, Soctt D. Allen, Arpan P. Mahorowala
  • Patent number: 6869899
    Abstract: The invention relates generally to lithographic patterning of very small features. In particular, the invention relates generally to patterning of semiconductor circuit features smaller than lithographically defined using either conventional optical lithography or next generation lithography techniques. The invention relates more particularly, but not by way of limitation, to lateral trimming of photoresist images.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: March 22, 2005
    Assignee: International Business Machines Corporation
    Inventors: Arpan P. Mahorowala, Maheswaran Surendra, Jung H. Yoon, Ying Zhang
  • Patent number: 6869542
    Abstract: Form an opening in a dielectric layer formed on a substrate comprises depositing a hard mask composed of an etch resistant material over a dielectric layer, e.g. a silicon oxide. Use a photoresist mask to expose the hard mask. Use a fluorocarbon plasma to etch through the window to form an opening through the hard mask. Then etch through the hard mask opening to pattern the dielectric layer. The hard mask comprises an RCH/RCHX material with the structural formula R:C:H or R:C:H:X, where R is selected from Si, Ge, B, Sn, Fe, Ti and X is selected from O, N, S and F. The plasma etching process employs a) a gas mixture comprising N2; fluorocarbon (CHF3, C4F8, C4F6, CF4, CH2F2, CH3F); an oxidizer (O2, CO2), and a noble diluent (Ar, He); b) a high DC bias (500-3000 Volts bias on the wafer); 3) medium pressure (20-100 mT.; and d) moderate temperatures (?20 to 60°).
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: March 22, 2005
    Assignee: International Business Machines Corporation
    Inventors: Sadanand V. Desphande, David Dobuzinsky, Arpan P. Mahorowala, Tina Wagner, Richard Wise
  • Patent number: 6849389
    Abstract: Disclosed is an in-situ process that prevents pattern collapse from occurring after they have been etched in S02-containing plasmas. The developed process involving treating the etched wafer to another plasma comprising of a chemically reducing gas such as H2. This treatment chemically reduces the hygroscopic sulfites/sulfates left on the surface after the main etch step. The lower sulfite/sulfate concentration on the wafer translates into considerably less moisture pick up and prevents high aspect ratio feature collapse.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: February 1, 2005
    Assignee: International Business Machines Corporation
    Inventor: Arpan P. Mahorowala
  • Publication number: 20040256698
    Abstract: A method for image reversal in semiconductor processing includes forming a first implant mask layer upon a semi-conductor substrate and forming a patterned photoresist layer over the first implant mask layer. Portions of the first implant mask layer not covered by the patterned photoresist layer are removed so as to expose non-patterned portions of the substrate. The photoresist layer is then removed, and a second implant mask layer is formed over the non-patterned portions of the substrate, wherein the first implant mask layer has an etch selectivity with respect to the second implant mask layer. The remaining portions of the first implant mask layer are removed to expose a reverse image of the substrate, including initially patterned portions of the substrate.
    Type: Application
    Filed: April 27, 2004
    Publication date: December 23, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven J. Holmes, Toshiharu Furukawa, Arpan P. Mahorowala, Dirk Pfeiffer
  • Publication number: 20040180269
    Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.
    Type: Application
    Filed: August 14, 2003
    Publication date: September 16, 2004
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa, Rich Wise, Arpan P. Mahorowala, Siddhartha Panda
  • Patent number: 6780736
    Abstract: A method for image reversal in semiconductor processing includes forming a first implant mask layer upon a semiconductor substrate and forming a patterned photoresist layer over the first implant mask layer. Portions of the first implant mask layer not covered by the patterned photoresist layer are removed so as to expose non-patterned portions of the substrate. The photoresist layer is then removed, and a second implant mask layer is formed over the non-patterned portions of the substrate, wherein the first implant mask layer has an etch selectivity with respect to the second implant mask layer. The remaining portions of the first implant mask layer are removed to expose a reverse image of the substrate, including initially patterned portions of the substrate.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: August 24, 2004
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Holmes, Toshiharu Furukawa, Arpan P. Mahorowala, Dirk Pfeiffer
  • Patent number: 6730454
    Abstract: Antireflective compositions characterized by the presence of an SiO-containing polymer having chromophore moieties and transparent moieties are useful antireflective hardmask compositions in lithographic processes. These compositions provide outstanding optical, mechanical and etch selectivity properties while being applicable using spin-on application techniques. The compositions of the invention are advantageously useful with shorter wavelength lithographic processes and/or have minimal residual acid content.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: May 4, 2004
    Assignee: International Business Machines Corporation
    Inventors: Dirk Pfeiffer, Marie Angelopoulos, Katherina Babich, Phillip Brock, Wu-Song Huang, Arpan P. Mahorowala, David R. Medeiros, Ratnam Sooriyakumaran
  • Publication number: 20040053504
    Abstract: A method for removing carbon from or stripping a TERA layer. The method includes exposing the TERA layer to a plasma containing an effective amount of nitrogen, and, optionally, oxygen or fluorine. The method is compatible with fluorine based etching systems, and may thus be performed in the same etching system as other etching steps. For example, the method may be performed in the same system as a fluorine based plasma etch for oxide or nitride. The invention includes the method of stripping a TERA layer, etching an oxide layer, and etching a nitride layer in situ in the same etching system. The method is performed at low ion energies to avoid damaging oxide or nitride layers under the TERA film and to provide good selectivity.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Richard S. Wise, Sadanand V. Deshpande, Wendy Yan, Scott D. Allen, Arpan P. Mahorowala
  • Patent number: 6649531
    Abstract: A process for forming a damascene structure includes depositing a bilayer comprising a first dielectric layer and a second dielectric layer onto a substrate, wherein the first layer has a dielectric constant higher than the second layer, and wherein the second layer is selected from a low k dielectric material comprising Si, C, O and H. The multi-step damascene structure is patterned into the dielectric bilayer using highly selective anisotropic reactive ion etching. Photoresist, polymers and post etch residues are removed from the substrate using a plasma ashing process without damaging the underlying dielectric layers.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: William J. Cote, Timothy J. Dalton, Prakash Chimanlal Dev, Daniel C. Edelstein, Scott D. Halle, Gill Yong Lee, Arpan P. Mahorowala
  • Publication number: 20030198877
    Abstract: Antireflective compositions characterized by the presence of an SiO-containing polymer having chromophore moieties and transparent moieties are useful antireflective hardmask compositions in lithographic processes. These compositions provide outstanding optical, mechanical and etch selectivity properties while being applicable using spin-on application techniques. The compositions of the invention are advantageously useful with shorter wavelength lithographic processes and/or have minimal residual acid content.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 23, 2003
    Applicant: International Business Machines Corporation
    Inventors: Dirk Pfeiffer, Marie Angelopoulos, Katherina Babich, Phillip Brock, Wu-Song Huang, Arpan P. Mahorowala, David R. Medeiros, Ratnam Sooriyakumaran
  • Patent number: 6586156
    Abstract: A chemically amplified (CA) photoresist system wherein a terpolymer containing ketal/phenolic/silicon based sidechains is provided. Among other things, the terpolymers provide for improved bake technologies. In another aspect a process for lithographic treatment of a substrate by means of ketal/phenolic/silicon based compositions and corresponding processes for the production of an object, particularly an electronic component are provided.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: July 1, 2003
    Assignee: International Business Machines Corporation
    Inventors: Marie Angelopoulos, Wu-Song Huang, Dai Junyan, Ranee W. Kwong, Robert N. Lang, Arpan P. Mahorowala, David R. Medeiros, Wayne M. Moreau, Karen E. Petrillo
  • Publication number: 20030100190
    Abstract: A process for forming a damascene structure includes depositing a bilayer comprising a first dielectric layer and a second dielectric layer onto a substrate, wherein the first layer has a dielectric constant higher than the second layer, and wherein the second layer is selected from a low k dielectric material comprising Si, C, O and H. The multi-step damascene structure is patterned into the dielectric bilayer using highly selective anisotropic reactive ion etching. Photoresist, polymers and post etch residues are removed from the substrate using a plasma ashing process without damaging the underlying dielectric layers.
    Type: Application
    Filed: November 26, 2001
    Publication date: May 29, 2003
    Applicant: International Business Machines Corporation
    Inventors: William J. Cote, Timothy J. Dalton, Prakash Chimanlal Dev, Daniel C. Edelstein, Scott D. Halle, Gill Yong Lee, Arpan P. Mahorowala
  • Publication number: 20030049561
    Abstract: A chemically amplified (CA) photoresist system wherein a terpolymer containing ketal/phenolic/silicon based sidechains is provided. Among other things, the terpolymers provide for improved bake technologies. In another aspect a process for lithographic treatment of a substrate by means of ketal/phenolic/silicon based compositions and corresponding processes for the production of an object, particularly an electronic component are provided.
    Type: Application
    Filed: July 17, 2001
    Publication date: March 13, 2003
    Applicant: International Business Machines Corporation
    Inventors: Marie Angelopoulos, Wu-Song Huang, Dai Junyan, Ranee W. Kwong, Robert N. Lang, Arpan P. Mahorowala, David R. Medeiros, Wayne M. Moreau, Karen E. Petrillo
  • Publication number: 20030017420
    Abstract: Disclosed is an in-situ process that prevents pattern collapse from occurring after they have been etched in S02-containing plasmas. The developed process involving treating the etched wafer to another plasma comprising of a chemically reducing gas such as Hz. This treatment chemically reduces the hygroscopic sulfites/sulfates left on the surface after the main etch step. The lower sulfite/sulfate concentration on the wafer translates into considerably less moisture pick up and prevents high aspect ratio feature collapse.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 23, 2003
    Applicant: International Business Machines Corporation
    Inventor: Arpan P. Mahorowala
  • Publication number: 20030017711
    Abstract: The invention relates generally to lithographic patterning of very small features. In particular, the invention relates generally to patterning of semiconductor circuit features smaller than lithographically defined using either conventional optical lithography or next generation lithography techniques. The invention relates more particularly, but not by way of limitation, to lateral trimming of photoresist images.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 23, 2003
    Applicant: International Business Machines Corporation
    Inventors: Arpan P. Mahorowala, Maheswaran Surendra, Jung H. Yoon, Ying Zhang
  • Patent number: 6482566
    Abstract: A photoresist composition which includes hydroxycarborane either incorporated as a monomeric dissolution modifier or as pendent groups on a polymer backbone. The photoresist composition is particularly useful in a bilayer thin film imaging lithographic process in which ultraviolet radiation-imaging in a wavelength range of between about 365 nm and about 13 nm is employed.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: November 19, 2002
    Assignee: International Business Machines Corporation
    Inventors: Donald C. Hofer, Scott A. MacDonald, Arpan P. Mahorowala, Robert D. Miller, Josef Michl, Gregory M. Wallraff
  • Patent number: 6420084
    Abstract: The invention provides improved resist compositions and lithographic methods using the resist compositions of the invention. The resist compositions of the invention are acid-catalyzed resists which are characterized by the presence of an SiO-containing polymer. The invention also encompasses methods of forming patterned material layers (especially conductive, semiconductive, or magnetic material structures) using the combination of the SiO-containing resist and a halogen compound-containing pattern transfer etchant where the halogen is Cl, Br or I.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: July 16, 2002
    Assignee: International Business Machines Corporation
    Inventors: Marie Angelopoulos, Ari Aviram, C. Richard Guarnieri, Wu-Song Huang, Ranee Kwong, Robert N. Lang, Arpan P. Mahorowala, David R. Medeiros, Wayne M. Moreau