Patents by Inventor Arpan Pravin Mahorowala
Arpan Pravin Mahorowala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240030062Abstract: Methods and apparatuses for an integration scheme for forming a fully aligned via using selective deposition of graphene on metal surfaces and selective deposition of an inhibitor layer on exposed barrier surfaces prior to depositing dielectric material are provided.Type: ApplicationFiled: April 15, 2022Publication date: January 25, 2024Inventors: Dennis M. Hausmann, Pankaj Ghanshyam Ramnani, Kashish Sharma, Paul C. Lemaire, Arpan Pravin Mahorowala
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Patent number: 11869770Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: GrantFiled: July 29, 2021Date of Patent: January 9, 2024Assignee: Lam Research CorporationInventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Patent number: 11784047Abstract: Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.Type: GrantFiled: April 22, 2021Date of Patent: October 10, 2023Assignee: Lam Research CorporationInventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A. van Cleemput, Bart J. van Schravendijk
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Publication number: 20220197147Abstract: A method for patterning a substrate includes providing a substrate, and depositing a multi-layer stack including N layers on the substrate. N is an integer greater than one. The N layers include N mean free paths for secondary electrons, respectively. The method includes depositing a photoresist layer on the multi-layer stack, wherein the N mean free paths converge in the photoresist layer. Another method for patterning a substrate includes providing a substrate and depositing a layer on the substrate. The layer includes varying mean free paths for secondary electrons. The method includes depositing a photoresist layer on the layer. The varying mean free paths for secondary electrons converge in the photoresist layer.Type: ApplicationFiled: May 15, 2020Publication date: June 23, 2022Inventors: Andrew LIANG, Nader SHAMMA, Rich WISE, Akhil SINGHAL, Arpan Pravin MAHOROWALA, Gregory BLACHUT, Dustin Zachary AUSTIN
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Publication number: 20220005694Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, formation of spacers involves deposition of a tin oxide layer on a semiconductor substrate having multiple protruding features. The deposition is performed in a deposition apparatus having a controller with program instructions configured to cause sequential contacting of the semiconductor substrate with a tin-containing precursor and an oxygen-containing precursor such as to coat the semiconductor substrate having the protruding features with a tin oxide layer. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the semiconductor substrate.Type: ApplicationFiled: September 21, 2021Publication date: January 6, 2022Inventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A. van Cleemput, Bart J. van Schravendijk
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Publication number: 20210358753Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap tilling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: ApplicationFiled: July 29, 2021Publication date: November 18, 2021Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Patent number: 11094542Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: GrantFiled: January 15, 2020Date of Patent: August 17, 2021Assignee: Lam Research CorporationInventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Publication number: 20210242019Abstract: Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.Type: ApplicationFiled: April 22, 2021Publication date: August 5, 2021Inventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A. van Cleemput, Bart J. van Schravendijk
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Publication number: 20200168466Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: ApplicationFiled: January 15, 2020Publication date: May 28, 2020Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Patent number: 10566194Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: GrantFiled: May 7, 2018Date of Patent: February 18, 2020Assignee: Lam Research CorporationInventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Publication number: 20190341256Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: ApplicationFiled: May 7, 2018Publication date: November 7, 2019Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Patent number: 6979518Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: GrantFiled: December 4, 2003Date of Patent: December 27, 2005Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
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Publication number: 20040170907Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: ApplicationFiled: December 4, 2003Publication date: September 2, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
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Patent number: 6730445Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: GrantFiled: November 22, 2002Date of Patent: May 4, 2004Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
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Patent number: 6682860Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: GrantFiled: April 12, 2002Date of Patent: January 27, 2004Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
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Publication number: 20030194569Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: ApplicationFiled: November 22, 2002Publication date: October 16, 2003Inventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
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Publication number: 20030194568Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: ApplicationFiled: April 12, 2002Publication date: October 16, 2003Applicant: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
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Patent number: 6514667Abstract: A lithographic structure and method of fabrication and use thereof having a plurality of layers at least one of which is a an RCHX layer which comprises a material having structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti and combinations thereof and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F and a layer of an energy active material. The RCHX layers are useful as hardmask layers, anti-reflection layers and hardmask anti-reflection layers. The RCHX layer can be vapor-deposited and patterned by patterning the energy active material and transferring the pattern to the RCHX layer.Type: GrantFiled: August 17, 2001Date of Patent: February 4, 2003Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, Alfred Grill, Scott David Halle, Arpan Pravin Mahorowala, Vishnubhai Vitthalbhai Patel
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Publication number: 20020012876Abstract: A lithographic structure and method of fabrication and use thereof having a plurality of layers at least one of which is a an RCHX layer which comprises a material having structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti and combinations thereof and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F and a layer of an energy active material. The RCHX layers are useful as hardmask layers, anti-reflection layers and hardmask anti-reflection layers. The RCHX layer can be vapor-deposited and patterned by patterning the energy active material and transferring the pattern to the RCHX layer.Type: ApplicationFiled: August 17, 2001Publication date: January 31, 2002Inventors: Marie Angelopoulos, Katherina Babich, Alfred Grill, Scott David Halle, Arpan Pravin Mahorowala, Vishnubhai Vitthalbhai Patel
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Patent number: 6316167Abstract: A lithographic structure and method of fabrication and use thereof having a plurality of layers at least one of which is a an RCHX layer which comprises a material having structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti and combinations thereof and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F and a layer of an energy active material. The RCHX layers are useful as hardmask layers, anti-reflection layers and hardmask anti-reflection layers. The RCHX layer can be vapor-deposited and patterned by patterning the energy active material and transferring the pattern to the RCHX layer.Type: GrantFiled: January 10, 2000Date of Patent: November 13, 2001Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, Alfred Grill, Scott David Halle, Arpan Pravin Mahorowala, Vishnubhai Vitthalbhai Patel