Patents by Inventor Arquimedes Martinez Canedo

Arquimedes Martinez Canedo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8677334
    Abstract: A computer-implemented method, system, and article of manufacture for parallelizing a code configured by coupling a functional block having an internal state and a functional block without any internal state. The method includes: creating and storing a graphical representation where functional blocks are chosen as nodes and connections between functional blocks are chosen as links; visiting the nodes on the graphical representation sequentially, detecting inputs from functional blocks without any internal state to functional blocks having an internal state and storing these functional blocks as a set of use blocks, and detecting inputs from functional blocks having an internal state to functional blocks without any internal state and storing these functional blocks as a set of definition blocks; and forming strands of functional blocks based on information on the set of use blocks and information on the set of definition blocks stored in association with the functional blocks.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Arquimedes Martinez Canedo, Hideaki Komatsu, Takeo Yoshizawa
  • Publication number: 20140026145
    Abstract: A human-machine interface (HMI) application (26) uses parallel processing. The HMI engineering system (24) allows explicit specification (44) of different cores of a multi-core processor (16) for different elements and/or actions. The programmer may design the HMI application for concurrent operation. The HMI engineering system (24) or runtime system (28) may test (56) for data dependency amongst the elements or actions and automatically assigns different cores where data is independent. During runtime, different threads for the HMI application (e.g., different elements and/or actions) are scheduled for different cores.
    Type: Application
    Filed: February 1, 2012
    Publication date: January 23, 2014
    Applicants: SIEMENS AKTIENGESELLSCHAFT, SIEMENS CORPORATION
    Inventors: Arquimedes Martinez Canedo, Sven Hermann, Lingyun Max Wang, Holger Strobel
  • Publication number: 20140019104
    Abstract: An approach and tool integrate cyber-physical systems design based on the function-behavior-state (FBS) methodology where multi-domain simulation models capturing both the behavioral and structural aspects of a system are automatically generated from its functional description. The approach focuses on simulation-enabled FBS models using automatic and context-sensitive mappings of functional basis elementary functions to simulation components described in physical modeling languages. Potentially beneficial process loops are recognized and inserted in the functional model.
    Type: Application
    Filed: July 15, 2013
    Publication date: January 16, 2014
    Applicant: SIEMENS CORPORATION
    Inventors: Arquimedes Martinez Canedo, Eric Alexander Schwarzenbach, Thomas Feichtinger
  • Publication number: 20140019112
    Abstract: Methods for product data management and corresponding systems and computer-readable mediums. A method includes receiving systems engineering data including a plurality of components and identifying interfaces from the plurality of components. The method includes synthesizing a network between the plurality of components. The method includes creating a simulation model, based on the network, by mapping the plurality of components to a corresponding plurality of simulation components and generating a simulation and control code according to the simulation model and the simulation components.
    Type: Application
    Filed: July 2, 2013
    Publication date: January 16, 2014
    Applicant: Siemens Product Lifecycle Management Software Inc.
    Inventors: Arquimedes Martinez Canedo, Dmitriy Okunev
  • Patent number: 8438553
    Abstract: Paralleling processing system and method. When clusters are formed based on strongly connected components, a single cluster (fat cluster) having at least a predetermined number of blocks, or an expected processing time exceeding a predetermined threshold, is formed. The fat cluster is subjected to an unrolling process to make multiple copies of the processing of the fat cluster and to assign the copies to individual processors. Processing of the fat cluster is executed by the multiple processor devices in a pipelined manner. If a fat cluster to be iteratively executed cannot be executed in the pipelined manner because a processing result of an nth iteration of the fat cluster depends on a processing result of a preceding iteration of the fat cluster an input value needed for execution of the fat cluster is generated based on a certain prediction, and the fat cluster is speculatively executed.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: May 7, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hideaki Komatsu, Arquimedes Martinez Canedo, Takeo Yoshizawa
  • Patent number: 8412496
    Abstract: A system, method and program to improve the processing speed of a simulation system. A processing system finds an entry point so that functional blocks cover a broad range. The processing system places code of a look-ahead dispatcher for assigning processing. The look-ahead dispatcher monitors an input state at the entry point to determine whether the input state is a stable state. If the input state is stable, the look-ahead dispatcher calls an adaptive execution module at some frequency or otherwise calls an idle execution module. The adaptive execution module performs processing on multiple timestamps at once. When a discrete system receives an input event, the look-ahead dispatcher calls a recovery execution module. Based on the input event on that occasion, the timestamp, and a value stored in a state vector, the recovery execution module calculates a state for which recovery is performed.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: April 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Arquimedes Martinez Canedo, Hideaki Komatsu
  • Publication number: 20130055196
    Abstract: Product data management systems, methods, and mediums. A method includes receiving a functional model, and identifying a plurality of elements of the functional model. Each element corresponds to one or more machine operations. The method includes identifying concurrencies between elements to determine at least one set of elements. The method includes creating an execution thread for each of the sets of elements. The method can include generating a rule-based programmable logic controller (PLC) program corresponding to the functional model, based on the execution threads.
    Type: Application
    Filed: February 2, 2012
    Publication date: February 28, 2013
    Applicants: Siemens Product Lifecycle Management Software Inc., Siemens Corporation
    Inventors: Arquimedes Martinez Canedo, Lingyun Lu
  • Publication number: 20120260239
    Abstract: A method of identifying and extracting functional parallelism from a PLC program has been developed that results in the ability of the extracted program fragments to be executed in parallel across a plurality of separate resources, and a compiler configured to perform the functional parallelism (i.e., identification and extraction processes) and perform the scheduling of the separate fragments within a given set of resources. The inventive functional parallelism creates a larger number of separable elements than was possible with prior dataflow analysis methodologies.
    Type: Application
    Filed: March 15, 2012
    Publication date: October 11, 2012
    Applicant: Siemens Corporation
    Inventors: Arquimedes Martinez Canedo, Mohammad Abdullah Al Faruque, Michell Packer, Richard Freitag
  • Publication number: 20110225225
    Abstract: Each ordinary differential equation of simultaneous ordinary differential equations is solved with an embedded Runge-Kutta method. A difference ? between an N-th order approximation and an (N+1)th order approximation is computed, and it is determined whether the difference is smaller than a predetermined threshold ?0. If ???0, then a step size is determined using a predetermined computation formula containing ?0/?, and then the process proceeds to next computation. A strand having an error of ?>?0 is directed to execute recomputation using a step size calculated based on ?0/?. Then the strand having the error executes recomputation by using a computed interpolated value. When the strand's error becomes smaller than the threshold ?0 the strand reaches the same time step as the strands computing the other ordinary differential equations having no error. The process thereby proceeds to next computation of the whole simultaneous ordinary differential equations.
    Type: Application
    Filed: March 11, 2011
    Publication date: September 15, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arquimedes Martinez Canedo, Hideaki Komatsu, Takeo Yoshizawa
  • Publication number: 20110107162
    Abstract: A computer-implemented method, system, and article of manufacture for parallelizing a code configured by coupling a functional block having an internal state and a functional block without any internal state. The method includes: creating and storing a graphical representation where functional blocks are chosen as nodes and connections between functional blocks are chosen as links; visiting the nodes on the graphical representation sequentially, detecting inputs from functional blocks without any internal state to functional blocks having an internal state and storing these functional blocks as a set of use blocks, and detecting inputs from functional blocks having an internal state to functional blocks without any internal state and storing these functional blocks as a set of definition blocks; and forming strands of functional blocks based on information on the set of use blocks and information on the set of definition blocks stored in association with the functional blocks.
    Type: Application
    Filed: October 28, 2010
    Publication date: May 5, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arquimedes Martinez Canedo, Hideaki Komatsu, Takeo Yoshizawa
  • Publication number: 20100305926
    Abstract: A system, method and program to improve the processing speed of a simulation system. A processing system finds an entry point so that functional blocks cover a broad range. The processing system places code of a look-ahead dispatcher for assigning processing. The look-ahead dispatcher monitors an input state at the entry point to determine whether the input state is a stable state. If the input state is stable, the look-ahead dispatcher calls an adaptive execution module at some frequency or otherwise calls an idle execution module. The adaptive execution module performs processing on multiple timestamps at once. When a discrete system receives an input event, the look-ahead dispatcher calls a recovery execution module. Based on the input event on that occasion, the timestamp, and a value stored in a state vector, the recovery execution module calculates a state for which recovery is performed.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 2, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Arquimedes Martinez Canedo, Hideaki Komatsu
  • Publication number: 20100138810
    Abstract: Paralleling processing system and method. When clusters are formed based on strongly connected components, a single cluster (fat cluster) having at least a predetermined number of blocks, or an expected processing time exceeding a predetermined threshold, is formed. The fat cluster is subjected to an unrolling process to make multiple copies of the processing of the fat cluster and to assign the copies to individual processors. Processing of the fat cluster is executed by the multiple processor devices in a pipelined manner. If a fat cluster to be iteratively executed cannot be executed in the pipelined manner because a processing result of an nth iteration of the fat cluster depends on a processing result of a preceding iteration of the fat cluster an input value needed for execution of the fat cluster is generated based on a certain prediction, and the fat cluster is speculatively executed.
    Type: Application
    Filed: December 2, 2009
    Publication date: June 3, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hideaki Komatsu, Arquimedes Martinez Canedo, Takeo Yoshizawa