Patents by Inventor Artem Polyakov

Artem Polyakov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260277689
    Abstract: In one embodiment, a computer node, includes memory, and at least one processor to execute a user application, a plurality of transfer backends, and a local transfer agent to register memory for data transfers to generate local metadata, receive from the user application a request to perform a memory data transfer with a remote computer node, receive remote metadata from a remote transfer agent of the remote computer node, select a transfer backend to fulfill the memory data transfer based on the remote metadata and the local metadata, and perform the memory data transfer using the selected transfer backend.
    Type: Application
    Filed: November 9, 2025
    Publication date: September 17, 2026
    Inventors: Moein Khazraee, Vishwanath Venkatesan, Neelay Shah, J Wyman, Piotr Tarasiewicz, David Zier, Omri Kahalon, Artem Polyakov, Adit Ranadive
  • Publication number: 20260281179
    Abstract: In one embodiment, a device includes at least one processor to execute a transfer backend plugin acting as an adaptor between a transfer agent and a hardware data transfer device, the transfer backend plugin being to initialize communication with a remote transfer backend plugin, exchange address information with the remote transfer backend plugin, register local memory for data transfers, exchange memory registration information with the remote transfer backend plugin, and interface with the hardware data transfer device to perform data transfers between the local memory and remote memory using at least one data transfer protocol, and a memory to store data used by the transfer backend plugin.
    Type: Application
    Filed: November 16, 2025
    Publication date: September 17, 2026
    Inventors: Moein Khazraee, Vishwanath Venkatesan, Subhadeep Bhattacharya, Timothy Stamler, Artem Polyakov, Omri Kahalon, Adit Ranadive, Kapil Arya
  • Publication number: 20260170080
    Abstract: Approaches presented herein provide for the efficient performance of operations such as general matrix multiplication (GEMM) operations. Data for such operations can be prefetched as needed, such as directly before a specific computation is to be performed on a pair of blocks of data. Prefetching for a subsequent computation can be performed during a current computation. After a current computation, the results can be accumulated during a subsequent computation, such as by using a data processing unit to offload the accumulation operation and free up one or more processing cores for other computations. Such operations can be performed in parallel until completed for each block of a result matrix. Individual computations can also be split among multiple workers (e.g., processing units) in at least one embodiment.
    Type: Application
    Filed: December 18, 2024
    Publication date: June 18, 2026
    Inventors: Subhadeep Bhattacharya, Artem Polyakov, Aviad Shaul Yehezkel, Gal Shalom, Omri Kahalon