Abstract: A memory circuit including a bit addressable binary data memory in which the data is stored in a plurality of dimensional directions and a circuit for accessing a group of the data in the memory in at least two of the dimensional directions and for moving the data to a different dimensional location while maintaining the data within the group. Also provided is a means for accessing the data by incrementally or decrementally addressing the data in at least one of the directions. The accessing circuitry is further used to perform bit block transfers of data within the memory. The accessing circuit also provides for horizontal or vertical access during a read operation while orthogonally rotating the data by 90 degrees during a following write operation.

Abstract: A method and apparatus of providing a visual representation of a curve image wherein curve image data is provided by a B-Spline equation computed with a forward difference technique using scaled integer variables. The method provides for the scaling of the initial base matrix computation of the geometry vector coefficients followed by the computation of the forward difference interval coefficients using integer arithmetic. The curve coordinate values for each interval are computed from the forward difference interval coefficient integers descaled by the scaling parameter. By employing integer arithmetic in a divide approximation technique, the use of floating point arithmetic is avoided. The apparatus for producing the visual representation of the curve image includes a computational section that provides for pipelined computations of the forward difference interval coefficients to provide high-speed curve coordinate value computation.