Patents by Inventor Arthur E. Geiss

Arthur E. Geiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of forming doped crystalline piezoelectric thin films via MOCVD and related doped crystalline piezoelectric thin films
    Patent number: 11856858
    Abstract: A method of forming a piezoelectric film can include providing a wafer in a CVD reaction chamber and forming an aluminum nitride material on the wafer, the aluminum nitride material doped with a first element E1 selected from group IIA or from group IIB and doped with a second element E2 selected from group IVB to provide the aluminum nitride material comprising a crystallinity of less than about 1.5 degree at Full Width Half Maximum (FWHM) to about 10 arcseconds at FWHM measured using X-ray diffraction (XRD).
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: December 26, 2023
    Assignee: Akoustis, Inc.
    Inventors: Craig Moe, Jeffrey M. Leathersich, Arthur E. Geiss
  • METHODS OF FORMING DOPED CRYSTALLINE PIEZOELECTRIC THIN FILMS VIA MOCVD AND RELATED DOPED CRYSTALLINE PIEZOELECTRIC THIN FILMS
    Publication number: 20200111949
    Abstract: A method of forming a piezoelectric film can include providing a wafer in a CVD reaction chamber and forming an aluminum nitride material on the wafer, the aluminum nitride material doped with a first element E1 selected from group IIA or from group IIB and doped with a second element E2 selected from group IVB to provide the aluminum nitride material comprising a crystallinity of less than about 1.5 degree at Full Width Half Maximum (FWHM) to about 10 arcseconds at FWHM measured using X-ray diffraction (XRD).
    Type: Application
    Filed: August 2, 2019
    Publication date: April 9, 2020
    Inventors: Craig Moe, Jeffrey M. Leathersich, Arthur E. Geiss
  • Semiconductor layer
    Patent number: 7704824
    Abstract: The present invention provides a highly doped semiconductor layer. More specifically, the present invention provides a semiconductor layer that includes at least two impurities. Each impurity is introduced at a level below its respective degradation concentration. In this manner, the two or more impurities provide an additive conductivity to the semiconductor layer at a level above the conductivity possible with any one of the impurities alone, due to the detrimental effects that would be created by increasing the concentration of any one impurity beyond its degradation concentration.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: April 27, 2010
    Assignee: RF Micro Devices, Inc.
    Inventors: Matthew L. Seaford, Arthur E. Geiss, Wayne Lewis, Larry W. Kapitan, Thomas J. Rogers
  • Semiconductor layer
    Publication number: 20040209434
    Abstract: The present invention provides a highly doped semiconductor layer.
    Type: Application
    Filed: May 11, 2004
    Publication date: October 21, 2004
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Matthew L. Seaford, Arthur E. Geiss, Wayne Lewis, Larry W. Kapitan, Thomas J. Rogers
  • Highly conductive semiconductor layer having two or more impurities
    Patent number: 6750482
    Abstract: The present invention provides a highly doped semiconductor layer. More specifically, the present invention provides a semiconductor layer that includes at least two impurities. Each impurity is introduced at a level below its respective degradation concentration. In this manner, the two or more impurities provide an additive conductivity to the semiconductor layer at a level above the conductivity possible with any one of the impurities alone, due to the detrimental effects that would be created by increasing the concentration of any one impurity beyond its degradation concentration.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: June 15, 2004
    Assignee: RF Micro Devices, Inc.
    Inventors: Matthew L. Seaford, Arthur E. Geiss, Wayne Lewis, Larry W. Kapitan, Thomas J. Rogers
  • Semiconductor layer
    Publication number: 20030201460
    Abstract: The present invention provides a highly doped semiconductor layer.
    Type: Application
    Filed: April 30, 2002
    Publication date: October 30, 2003
    Inventors: Matthew L. Seaford, Arthur E. Geiss, Wayne Lewis, Larry W. Kapitan, Thomas J. Rogers