Abstract: An interposer for a flow cell comprises a base layer having a first surface and a second surface opposite the first surface. The base layer comprises black polyethylene terephthalate (PET). A first adhesive layer is disposed on the first surface of the base layer. The first adhesive layer comprises methyl acrylic adhesive. A second adhesive layer is disposed on the second surface of the base layer. The second adhesive layer comprises methyl acrylic adhesive. A plurality of microfluidic channels extends through each of the base layer, the first adhesive layer, and the second adhesive layer.

Abstract: An interposer for a flow cell comprises a base layer having a first surface and a second surface opposite the first surface. The base layer comprises black polyethylene terephthalate (PET). A first adhesive layer is disposed on the first surface of the base layer. The first adhesive layer comprises methyl acrylic adhesive. A second adhesive layer is disposed on the second surface of the base layer. The second adhesive layer comprises methyl acrylic adhesive. A plurality of microfluidic channels extends through each of the base layer, the first adhesive layer, and the second adhesive layer.

Abstract: Methods for forming solar cells include forming, over a substrate, a first junction comprising at least one III-V material and having a threading dislocation density of less than approximately 107 cm?2, and forming, over the first junction, a cap layer comprising silicon, wherein the substrate consists essentially of silicon.

Abstract: In various embodiments, an array of discrete solar cells with associated devices such as bypass diodes is formed over a single substrate.

Abstract: In various embodiments, an array of discrete solar cells with associated devices such as bypass diodes is formed over a single substrate.

Abstract: In various embodiments, an array of discrete solar cells with associated devices such as bypass diodes is formed over a single substrate. In one instance, a method of forming a solar-cell array with integrated bypass diodes comprising: providing a semiconductor substrate, a first cell comprising a SiGe p-n junction or SiGe p-i-n junction, one or more second cells each comprising a III-V semiconductor p-n junction or III-V semiconductor p-i-n junction; forming a bypass diode that is discrete and laterally separate from its associated solar cell and comprises an unremoved portion of the first cell, the formation comprising removing an unremoved portion of the one or more second cells thereover.

Abstract: A high-density memory device is fabricated three-dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.

Abstract: In various embodiments, solar cells include a junction including SiGe, a junction including at least one III-V material, and may be formed on silicon substrates and/or with silicon-based capping layers thereover.

Abstract: In various embodiments, solar cells include a junction including SiGe, a junction including at least one III-V material, and may be formed on silicon substrates and/or with silicon-based capping layers thereover.

Abstract: In various embodiments, solar cells include a junction including SiGe, a junction including at least one III-V material, and may be formed on silicon substrates and/or with silicon-based capping layers thereover.

Abstract: A high-density memory device is fabricated three-dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.

Abstract: Methods for forming solar cells include forming, over a substrate, a first junction comprising at least one III-V material and having a threading dislocation density of less than approximately 107 cm?2, and forming, over the first junction, a cap layer comprising silicon, wherein the substrate consists essentially of silicon.

Abstract: Solar cells include a substrate consisting essentially of silicon, a first junction disposed over the substrate, the first junction comprising at least one III-V material and having a threading dislocation density of less than approximately 107 cm?2, and a cap layer disposed over the first junction, the cap layer comprising silicon.

Abstract: A high-density memory device is fabricated three-dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.

Abstract: A method and structure for forming semiconductor structures using tensilely strained gettering layers. The method includes forming a donor wafer comprising a tensilely strained gettering layer disposed over a substrate, and at least one material layer disposed over the tensilely strained gettering layer. Additionally, the donor wafer may possess a particle-confining region proximate the tensilely strained layer. The method also includes introducing particles into the donor wafer to a depth below the surface, and accumulating at least some particles within the tensilely strained gettering layer. Next, the method includes initiating a cleaving action so as to separate at least one of the material layers form the substrate. The tensilely strained gettering layer may accumulate particles and/or point defects and reduce the implantation dose and thermal budget required for cleaving.