Patents by Inventor Arthur John Low
Arthur John Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9325811Abstract: A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyze the packets and to provide a header including a list of processes to perform on the packet of data and an ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes.Type: GrantFiled: January 7, 2014Date of Patent: April 26, 2016Assignee: Conversant Intellectual Property Management Inc.Inventors: Arthur John Low, Stephen J. Davis
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Publication number: 20140122582Abstract: A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyse the packets and to provide a header including a list of processes to perform on the packet of data and an ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes.Type: ApplicationFiled: January 7, 2014Publication date: May 1, 2014Applicant: MOSAID TECHNOLOGIES INCORPORATEDInventors: Arthur John LOW, Stephen J. DAVIS
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Patent number: 8639912Abstract: A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyze the packets and to provide a header including a list of processes to perform on the packet of data and an ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes.Type: GrantFiled: November 16, 2009Date of Patent: January 28, 2014Assignee: Mosaid Technologies IncorporatedInventors: Arthur John Low, Stephen J. Davis
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Publication number: 20100064116Abstract: A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyse the packets and to provide a header including a list of processes to perform on the packet of data and an ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes.Type: ApplicationFiled: November 16, 2009Publication date: March 11, 2010Applicant: Mosaid Technologies IncorporatedInventors: Arthur John Low, Stephen J. Davis
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Patent number: 7631116Abstract: A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyse the packets and to provide a header including a list of processes to perform on the packet of data and an ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes.Type: GrantFiled: October 25, 2005Date of Patent: December 8, 2009Assignee: Mosaid Technologies IncorporatedInventors: Arthur John Low, Stephen J. Davis
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Patent number: 7386705Abstract: An apparatus for calculating and encryption of data has a multistage processing array and a plurality of registers. Each register has a status bit which indicates a “go” or “done” condition when the register is loaded. This enables the process array, after completion of a processing cycle, to connect to a “ready” register.Type: GrantFiled: August 27, 2002Date of Patent: June 10, 2008Assignee: MOSAID Technologies Inc.Inventors: Arthur John Low, Neil Farquhar Hamilton, Hafid Zaabab
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Patent number: 6959346Abstract: A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyse the packets and to provide a header including a list processes to perform on the packet of data and am ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes.Type: GrantFiled: December 22, 2000Date of Patent: October 25, 2005Assignee: MOSAID Technologies, Inc.Inventors: Arthur John Low, Stephen J. Davis
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Publication number: 20040044898Abstract: An apparatus for calculating and encryption of data has a multistage processing array and a plurality of registers. Each register has a status bit which indicates a “go” or “done” condition when the register is loaded. This enables the process array, after completion of a processing cycle, to connect to a “ready” register.Type: ApplicationFiled: August 27, 2002Publication date: March 4, 2004Applicant: MOSAID Technologies, Inc.Inventors: Arthur John Low, Neil Farquhar Hamilton, Hafid Zaabab
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Publication number: 20020087708Abstract: A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyse the packets and to provide a header including a list processes to perform on the packet of data and am ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes.Type: ApplicationFiled: December 22, 2000Publication date: July 4, 2002Inventors: Arthur John Low, Stephen J. Davis