Patents by Inventor Arthur Piejko

Arthur Piejko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit storage element having low power data retention and method therefor
    Publication number: 20060192604
    Abstract: A storage element (10) includes a first latch (12) and a second latch (14). The first latch (12) is coupled to a first power supply voltage terminal for receiving a first power supply voltage. The second latch (14) is coupled to a second power supply voltage terminal. The second power supply voltage terminal for receiving a second power supply voltage that is lower than the first power supply voltage. During a normal mode of operation, the second power supply voltage is not provided to the second latch. During a low power mode of operation data is transferred from the first latch to the second latch and the first latch is powered down. The data is retained by the second latch while in low power mode.
    Type: Application
    Filed: February 25, 2005
    Publication date: August 31, 2006
    Inventors: Ravindraraj Ramaraju, David Bearden, Arthur Piejko