Patents by Inventor Arturo Ruiz

Arturo Ruiz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170068720
    Abstract: An analytics engine for determining analytic relationships in data queries based on responsive data sets includes a memory for storing data and a processor in communication with the memory. The processor is configured to identify a data query for analysis from a query repository, retrieve a plurality of interaction data associated with the data query, wherein the interaction data represents interactions between a plurality of user systems and a query result previously generated based on the data query, wherein the query result includes a plurality of links, identify a link selection count for each of the plurality of links based on the plurality of interaction data, classify the data query as one of a content targeting query and a data-creator targeting query based upon the plurality of link selection counts, and generate a query characteristic analysis based upon the classified data query and the plurality of link selection counts.
    Type: Application
    Filed: September 4, 2015
    Publication date: March 9, 2017
    Inventors: Jeongwoo Ko, Frank Uyeda, Arturo Ruiz, II, Bozhena Bidyuk
  • Patent number: 7943983
    Abstract: Memory devices having an increased effective channel length and/or improved TPD characteristics, and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line dielectrics between the memory cells. The memory cell contains a pair of first bit lines and a pair of second bit lines. The first and second bit lines can be formed by an implant process using first and second spacers that have different lateral lengths from each other. The spacers can be used to offset the implants, thereby controlling the lateral lengths of the bit lines.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: May 17, 2011
    Assignee: Spansion LLC
    Inventors: Huaqiang Wu, Hiro Kinoshita, Ning Cheng, Arturo Ruiz, Jihwan Choi
  • Publication number: 20100155785
    Abstract: Memory devices having an increased effective channel length and/or improved TPD characteristics, and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line dielectrics between the memory cells. The memory cell contains a pair of first bit lines and a pair of second bit lines. The first and second bit lines can be formed by an implant process using first and second spacers that have different lateral lengths from each other. The spacers can be used to offset the implants, thereby controlling the lateral lengths of the bit lines.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 24, 2010
    Applicant: SPANSION LLC
    Inventors: Huaqiang Wu, Hiro Kinoshita, Ning Cheng, Arturo Ruiz, Jihwan Choi
  • Patent number: 5303122
    Abstract: The present invention provides a printed circuit board having a unique commonized pad upon which different sized surface mounted devices can be mounted. The preferred form of the commonized pad comprises two electrically conductive pads, each having a tapered portion that electrically connects a narrow portion to a wide portion. The present invention is advantageous over known pads in that it (1) allows for using different sizes of surface mounted devices without redesign and (2) it does not require wasting what might otherwise be antiquated inventory or continuation of an old process to use up what would be antiquated inventory.
    Type: Grant
    Filed: May 19, 1993
    Date of Patent: April 12, 1994
    Assignee: Ford Motor Company
    Inventors: Clifford G. Adams, Jr., Donald P. Beaudoin, Arturo Ruiz-Miramontes