Patents by Inventor Arumanayagam Rajasekar

Arumanayagam Rajasekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TYPE-3 PRINTED CIRCUIT BOARDS (PCBS) WITH HYBRID LAYER COUNTS
    Publication number: 20220095456
    Abstract: In one embodiment, a printed circuit board includes a first circuit board portion comprising a set of first conducting layers and one or more plated through hole (PTH) vias formed through the first conducting layers and a second circuit board portion comprising a set of second conducting layers. The second circuit board portion has an area less than an area of the first circuit board portion, and the second circuit board portion is coupled to the first circuit board portion via a laminate layer such that the first and second conducting layers are parallel with one another. The printed circuit board further includes one or more PTH vias formed through the first and second conducting layers in an area of the printed circuit board where the first and second circuit board portions overlap.
    Type: Application
    Filed: December 6, 2021
    Publication date: March 24, 2022
    Applicant: Intel Corporation
    Inventors: Arumanayagam Rajasekar, Tin Poay Chuah, Sushil Padmanabhan, Aiswarya M. Pious, Navneet Kumar Singh