Abstract: A method and system for determining a session count is described. At a user interface a request is received to determine a session count for a time period. Based on the received request, the session count is determined based on unique new session counts corresponding to one or more time intervals included in the time period and carry forward session count corresponding to an initial time interval included in the time period. Finally, the determined session count is displayed at the user interface.

Abstract: A method and system for determining a session count is described. At a user interface a request is received to determine a session count for a time period. Based on the received request, the session count is determined based on unique new session counts corresponding to one or more time intervals included in the time period and carry forward session count corresponding to an initial time interval included in the time period. Finally, the determined session count is displayed at the user interface.

Abstract: In a multi-wire channel that includes at least three wires, each unique wire pair of the multi-wire channel has approximately the same signal propagation time. In this way, jitter can be mitigated in the multi-wire channel for signaling where, for a given data transfer, a differential signal is transmitting on a particular pair of the wires and every other wire is floating. In some implementations, matching of the signal propagation times involves providing additional delay for at least one of the wires. The additional delay is provided using passive signal delay techniques and/or active signal delay techniques.

Abstract: In a multi-wire channel that includes at least three wires, each unique wire pair of the multi-wire channel has approximately the same signal propagation time. In this way, jitter can be mitigated in the multi-wire channel for signaling where, for a given data transfer, a differential signal is transmitting on a particular pair of the wires and every other wire is floating. In some implementations, matching of the signal propagation times involves providing additional delay for at least one of the wires. The additional delay is provided using passive signal delay techniques and/or active signal delay techniques.

Abstract: In a multi-wire channel that includes at least three wires, each unique wire pair of the multi-wire channel has approximately the same signal propagation time. In this way, jitter can be mitigated in the multi-wire channel for signaling where, for a given data transfer, a differential signal is transmitting on a particular pair of the wires and every other wire is floating. In some implementations, matching of the signal propagation times involves providing additional delay for at least one of the wires. The additional delay is provided using passive signal delay techniques and/or active signal delay techniques.

Abstract: In a multi-wire channel that includes at least three wires, each unique wire pair of the multi-wire channel has approximately the same signal propagation time. In this way, jitter can be mitigated in the multi-wire channel for signaling where, for a given data transfer, a differential signal is transmitting on a particular pair of the wires and every other wire is floating. In some implementations, matching of the signal propagation times involves providing additional delay for at least one of the wires. The additional delay is provided using passive signal delay techniques and/or active signal delay techniques.

Abstract: A method and apparatus for performing template-based classification of a circuit design are disclosed. A template file is read that defines a plurality of channel-connected-region (CCR) templates. A graph is formatted for each of the CCR templates. A plurality of CCRs are identified based on a partitioned netlist file that defines a given circuit design. A graph is generated for each of the identified CCRs. A matching CCR template graph is identified for each generated CCR graph. The template file may further defines super-CCR templates, and a graph may be formatted for each of the super-CCR templates. All possible combinations of CCRs and previously-matched super-CCRs that are candidates to match the formatted super-CCR template graph may be determined in an interative manner, for each formatted super-CCR template graph. A determination may be made as to which of the candidate combinations actually match the formatted super-CCR template graph.

Abstract: Presented is a method of protecting data. The method includes recognizing a newly created data file, providing at least one data protection policy for selection by a user, obtaining a user input for selecting at least one data protection policy, applying the selected data protection policy to the newly created data file, creating a backup copy of the newly created data file based on the applied data protection policy, and storing the backup copy of the newly created data file based on the applied data protection policy.

Abstract: A method and apparatus for performing template-based classification of a circuit design are disclosed. A template file is read that defines a plurality of channel-connected-region (CCR) templates. A graph is formatted for each of the CCR templates. A plurality of CCRs are identified based on a partitioned netlist file that defines a given circuit design. A graph is generated for each of the identified CCRs. A matching CCR template graph is identified for each generated CCR graph. The template file may further defines super-CCR templates, and a graph may be formatted for each of the super-CCR templates. All possible combinations of CCRs and previously-matched super-CCRs that are candidates to match the formatted super-CCR template graph may be determined in an interative manner, for each formatted super-CCR template graph. A determination may be made as to which of the candidate combinations actually match the formatted super-CCR template graph.

Abstract: A technique for constraint management and validation for template-based device designs is disclosed. The technique includes generating a template-level representation of an electronic device design based on a transistor-level representation of the electronic device design. The template-level representation includes one or more hierarchies of templates. Each template represents a corresponding portion of the electronic device design. The technique further includes determining constraint declarations associated with the electronic device design and verifying whether there is a functional equivalence between the template-level representation to a register-transfer-level (RTL) representation of the electronic device design. The technique additionally includes verifying whether the constraint declarations are valid and verifying the electronic device design responsive to verifying the functional equivalence and verifying the constraint declarations.

Abstract: A technique for constraint management and validation for template-based device designs is disclosed. The technique includes generating a template-level representation of an electronic device design based on a transistor-level representation of the electronic device design. The template-level representation includes one or more hierarchies of templates. Each template represents a corresponding portion of the electronic device design. The technique further includes determining constraint declarations associated with the electronic device design and verifying whether there is a functional equivalence between the template-level representation to a register-transfer-level (RTL) representation of the electronic device design. The technique additionally includes verifying whether the constraint declarations are valid and verifying the electronic device design responsive to verifying the functional equivalence and verifying the constraint declarations.

Abstract: A filter comprises a band pass filter that may have a first resonator, a second resonator and a coupling between the first resonator and the second resonator. The coupling may be controlled by at least one of (i) a spacing between the first resonator and the second resonator, and (ii) a shunt inductance coupled to the coupling.

Abstract: A method and apparatus for improved formal equivalence checking to verify the operation of components in a VLSI integrated circuit. The present invention enhances previous techniques for dynamic circuits by generating a multi-level transistor abstraction for dynamic circuits. Two-levels of abstracted code are generated. First, an abstracted legal Verilog® is generated for the evaluate phase of a dynamic circuit. Second, “comment-logic” in Verilog® syntax is generated for the pre-charge phase of the dynamic circuit. Using the method and apparatus of the present invention, it is possible to obtain a multi-level transistor abstraction for both the “clk=0” and the “clk=1” conditions. The binary decision diagram property of the circuit being analyzed is used to generate multi-level representations for both the pre-charge (clk=0) and the evaluate phases (clk=1). The multi-level abstracted model of the present invention has several advantages over the prior art.

Abstract: A method and apparatus for improved formal equivalence checking to verify the operation of components in a VLSI integrated circuit. The present invention enhances previous techniques for dynamic circuits by generating a multi-level transistor abstraction for dynamic circuits. Two-levels of abstracted code are generated. First, an abstracted legal Verilog® is generated for the evaluate phase of a dynamic circuit. Second, “comment-logic” in Verilog® syntax is generated for the pre-charge phase of the dynamic circuit. Using the method and apparatus of the present invention, it is possible to obtain a multi-level transistor abstraction for both the “clk=0” and the “clk=1” conditions. The binary decision diagram property of the circuit being analyzed is used to generate multi-level representations for both the pre-charge (clk=0) and the evaluate phases (clk=1). The multi-level abstracted model of the present invention has several advantages over the prior art.

Abstract: A highly compact bandpass filter that has excellent mechanical strength is disclosed. A bandpass filter according to the present invention employs a dielectric block of substantially rectangular prismatic shape constituted of a first portion lying between a first cross-section of the dielectric block and a second cross-section of the dielectric block substantially parallel to the first cross-section and second and third portions divided by the first portion and metal plates formed on surfaces of the dielectric block. The first portion of the dielectric block and the metal plates formed thereon are enabled to act as an evanescent waveguide. The second portion of the dielectric block and the metal plates formed thereon are enabled to act as a first resonator. The third portion of the dielectric block and the metal plates formed thereon are enabled to act as a second resonator. The metal plates include an inductive stub formed on the surface of the first portion of the dielectric block.

Abstract: A highly compact band pass filter that has excellent mechanical strength is disclosed. A band pass filter according to the present invention employs a dielectric block of substantially rectangular prismatic shape constituted of a first portion lying between a first cross-section of the dielectric block and a second cross-section of the dielectric block substantially parallel to the first cross-section and second and third portions divided by the first portion and metal plates formed on surfaces of the dielectric block. The first portion of the dielectric block and the metal plates formed thereon are enabled to act as an evanescent waveguide. The second portion of the dielectric block and the metal plates formed thereon are enabled to act as a first resonator. The third portion of the dielectric block and the metal plates formed thereon are enabled to act as a second resonator. The metal plates include at least one exciting electrode formed on a first surface of the dielectric block which has the widest area.

Abstract: Thin type TEM dual-mode rectangular-planar dielectric waveguide bandpass filter is disclosed. The bandpass filter disclosed in the specification is constituted of a dielectric block 11 having a top surface, a bottom surface and first to fourth side surfaces, a metal plate 12 to be in a floating state substantially entirely formed on the top surface of the dielectric block 11, a metal plate 13 to be grounded formed on the bottom surface of the dielectric block 11, and exciting electrodes 14 and 15 formed on the bottom surface of the dielectric block 11. The metal plate 13 has a removed portion 16 exposing a part of the bottom surface of the dielectric block 11. The removed portion 16 destroys the symmetry of the resonator structure of each mode so that a coupling between the dual-mode is provided. According to this structure, because the exciting electrodes 14 and 15 are formed on the bottom surface of the dielectric block 11, thickness of the dielectric block 11 can be easily reduced.

Abstract: A method for comparing two delimited strings, each of which has a plurality of substrings, includes pairing each substring in one of the delimited string with a corresponding substring in the other one of the delimited strings. The method further includes computing a proximity value for each pair of substrings, and computing a set of decaying weights corresponding to the pairs of substrings, multiplying the proximity value for each pair of substrings by the corresponding weight, and summing the weighted proximity values to obtain a strength of match between the delimited strings.

Abstract: A highly compact and easily fabricated band pass filter is disclosed. A band pass filter according to the present invention employs a first half-wave (&lgr;/2) resonator having a first open end on which an input terminal is formed and a second open end opposite to the first open end, a second half-wave (&lgr;/2) resonator having a third open end on which an output terminal is formed and a fourth open end opposite to the third open end, and an evanescent waveguide interposed between the second open end of the first resonator and the fourth open end of the second resonator. The first half-wave (&lgr;/2) resonator, the second half-wave (&lgr;/2) resonator, and the evanescent waveguide being single-unit. An air gap does not have to be formed by mounting components on a printed circuit board. Therefore, the overall size of the band pass filter can be miniaturized and fabrication of the band pass filter is simplified.

Abstract: A highly compact band pass filter that has excellent mechanical strength is disclosed. A band pass filter according to the present invention employs a dielectric block of substantially rectangular prismatic shape constituted of a first portion lying between a first cross-section of the dielectric block and a second cross-section of the dielectric block substantially parallel to the first cross-section and second and third portions divided by the first portion and metal plates formed on the surfaces of the dielectric block. The first portion of the dielectric block and the metal plates formed thereon are enabled to act as an evanescent waveguide. The second portion of the dielectric block and the metal plates formed thereon are enabled to act as a first resonator. The third portion of the dielectric block and the metal plates formed thereon are enabled to act as a second resonator.