Patents by Inventor ARUN GEORGE

ARUN GEORGE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200410467
    Abstract: Identifying data associated with a deposit is linked to contact information associated with an issuer of the deposit. During deposit processing, the issuer is identified, and an out-of-band message is sent to a device operated by the issuer requesting that the deposit be validated or be declined. Responsive to an instruction received from the issuer, the deposit processing continues, or the deposit is declined and not further processed.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventor: Arun George Eapen
  • Patent number: 10824555
    Abstract: A method for flash-aware heap memory management includes reserving a contiguous virtual space in a memory space of at least one process with a size equivalent to a size of a flash-based byte addressable device. The method also includes partitioning by a host device the memory space of the flash-based byte addressable device into multiple chunks. Each chunk includes multiple logical segments. The host device receives a memory allocation request from a thread associated with an application. The host device determines at least one chunk from the multiple chunks, including a least free logical segment compared to the other chunks from the multiple chunks. The host device allocates to the thread at least one chunk that includes the least free logical segment.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: November 3, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Vishak Guddekoppa, Arun George, Mitesh Sanjay Mutha, Rakesh Nadig
  • Patent number: 10679050
    Abstract: Various embodiments herein each include at least one of systems, devices, software, and methods for invalidation recognition and fraud prevention. One embodiment, in the form of a method, includes identifying a document-type of a received image as a check and identifying each of at least one area of the received image as a zone of the check. This method continues by processing each zone to locate text or symbols indicating the check is non-negotiable and subsequently outputting a non-negotiable rejection indication to prevent further payment processing of the check image.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: June 9, 2020
    Assignee: NCR Corporation
    Inventor: Arun George Eapen
  • Publication number: 20190236349
    Abstract: Various embodiments herein each include at least one of systems, devices, software, and methods for invalidation recognition and fraud prevention. One embodiment, in the form of a method, includes identifying a document-type of a received image as a check and identifying each of at least one area of the received image as a zone of the check. This method continues by processing each zone to locate text or symbols indicating the check is non-negotiable and subsequently outputting a non-negotiable rejection indication to prevent further payment processing of the check image.
    Type: Application
    Filed: January 30, 2018
    Publication date: August 1, 2019
    Inventor: Arun George Eapen
  • Publication number: 20180349049
    Abstract: A document image is obtained and fine-grain item-specific information within the document image is encrypted with varying levels of encryption, each encryption level associated is with a specific security access role. When the document image is presented to an end-user, the end-user's security access role determines which portions of the fine-grain item-specific information is decrypted and which portions remain encrypted, such that some portions of the document image are obfuscated from the end-user based on the end-user's security access role.
    Type: Application
    Filed: May 30, 2017
    Publication date: December 6, 2018
    Inventor: Arun George Eapen
  • Publication number: 20180336140
    Abstract: A method for flash-aware heap memory management includes reserving a contiguous virtual space in a memory space of at least one process with a size equivalent to a size of a flash-based byte addressable device. The method also includes partitioning by a host device the memory space of the flash-based byte addressable device into multiple chunks. Each chunk includes multiple logical segments. The host device receives a memory allocation request from a thread associated with an application. The host device determines at least one chunk from the multiple chunks, including a least free logical segment compared to the other chunks from the multiple chunks. The host device allocates to the thread at least one chunk that includes the least free logical segment.
    Type: Application
    Filed: May 16, 2018
    Publication date: November 22, 2018
    Inventors: VISHAK GUDDEKOPPA, ARUN GEORGE, MUTHA SANJAY MITESH, RAKESH NADIG